CS2300CP-CZZR Cirrus Logic Inc, CS2300CP-CZZR Datasheet - Page 23

• Manufacturer Part Number: CS2300CP-CZZR
• Description: IC General Purpose PLL LCO
• Manufacturer: Cirrus Logic Inc
• Type: Fanout Distribution, Fractional N Synthesizerr

Specifications of CS2300CP-CZZR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1494 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1405-2; CS2300CP-CZZR

DS843F1
6.3
6.3.1
7. REGISTER QUICK REFERENCE
This table shows the register and bit names with their associated default values.
EnDevCfg1, EnDevCfg2, and EnDevCfg3 bits must be set to 1 for normal operation.
WARNING: All “Reserved” registers must maintain their default state to ensure proper functional operation.
Adr
p 24
p 24
p 25
p 26
p 27
p 28
p 28
1Eh
01h
02h
03h
05h
06h
09h
16h
17h
-
Device ID
Device Ctrl
Device Cfg 1
Global Cfg
32-Bit Ratio
Funct Cfg 1
Funct Cfg 2
Funct Cfg 3
Memory Address Pointer
The Memory Address Pointer (MAP) byte comes after the address byte and selects the register to be read
or written. Refer to the pseudocode above for implementation details.
Name
Map Auto Increment
The device has MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is
set to 0, MAP will stay constant for successive I²C writes or reads and SPI writes. If INCR is set to 1, MAP
will auto increment after each byte is read or written, allowing block reads or writes of successive regis-
ters.
RModSel2
ClkSkipEn AuxLockCfg
Reserved
Reserved
Reserved
Device4
LSB+15
Unlock
MSB-8
LSB+7
MSB
7
0
x
0
0
0
0
0
ClkIn_BW2 ClkIn_BW1 ClkIn_BW0
...........................................................................................................................
...........................................................................................................................
...........................................................................................................................
...........................................................................................................................
RModSel1
Reserved
Reserved
Reserved
Device3
6
0
0
0
0
0
0
x
RModSel0
Reserved
Reserved
Reserved
Reserved
Device2
5
0
0
0
0
0
0
x
EnDevCfg3
ClkOutUnl
Reserved
Reserved
Reserved
Device1
4
0
0
0
0
0
0
0
LFRatioCfg
Reserved
Reserved
Reserved
Reserved
Device0
Freeze
3
0
0
0
0
0
0
0
AuxOutSrc1 AuxOutSrc0 EnDevCfg1
Revision2
Reserved
Reserved
Reserved
Reserved
Reserved
2
0
0
0
0
0
0
x
AuxOutDis
Revision1
Reserved
Reserved
Reserved
Reserved
1
0
0
0
0
0
0
x
CS2300-CP
EnDevCfg2
ClkOutDis
Revision0
Reserved
Reserved
Reserved
MSB-15
MSB-7
LSB+8
LSB
0
0
0
0
0
0
0
x
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