CY7C1049CV33-10VXAT Cypress Semiconductor Corp, CY7C1049CV33-10VXAT Datasheet - Page 6

• Manufacturer Part Number: CY7C1049CV33-10VXAT
• Description: CY7C1049CV33-10VXAT
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1049CV33-10VXAT

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 4M (512K x 8)
• Speed: 10ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 36-SOJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AC Switching Characteristics
Over the Operating Range
Document #: 38-05006 Rev. *K
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes
power
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V.
6. t
7. t
8. At any temperature and voltage condition, t
9. The internal Write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a Write, and the transition of either of
10. The minimum Write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of t
these signals can terminate the Write. The input data setup and hold timing should be referenced to the leading edge of the signal that terminates the Write.
POWER
HZOE
Parameter
[6]
, t
HZCE
gives the minimum amount of time that the power supply should be at stable, typical V
, and t
[9, 10]
HZWE
V
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power Up
CE HIGH to Power Down
Write Cycle Time
CE LOW to Write End
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
CC
(typical) to the first access
[5]
HZCE
[8]
[7, 8]
[8]
[7, 8]
[7, 8]
is less than t
LZCE
, t
Description
HZOE
is less than t
LZOE
, and t
HZWE
HZWE
CC
is less than t
values until the first memory access can be performed.
and t
SD
.
LZWE
for any device.
Min
100
8
–
3
–
–
0
–
3
–
0
–
8
6
6
0
0
6
4
0
3
–
CY7C1049CV33
-8
Max
–
–
8
–
8
5
–
4
–
4
–
8
–
–
–
–
–
–
–
–
–
4
Page 6 of 13
Unit
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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