CY7C1480BV33-200AXC Cypress Semiconductor Corp, CY7C1480BV33-200AXC Datasheet - Page 27

• Manufacturer Part Number: CY7C1480BV33-200AXC
• Description: CY7C1480BV33-200AXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1480BV33-200AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Figure 4
Document Number: 001-15145 Rev. *E
Notes
Data Out (Q)
19. On this diagram, when CE is LOW: CE
20. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW, and BW
Data In (D)
ADDRESS
ADSP
ADSC
BWE,
ADV
BW
CLK
GW
OE
CE
X
shows write cycle timing.
BURST READ
High-Z
t ADS
t CES
t AS
A1
t ADH
t CEH
t AH
t CH
t
OEHZ
Byte write signals are
ignored for first cycle when
ADSP initiates burst
t CYC
t ADS
t CL
t DS
Single WRITE
D(A1)
(continued)
t ADH
t DH
[19, 20]
1
is LOW, CE
A2
2
is HIGH, and CE
D(A2)
Figure 4. Write Cycle Timing
DON’T CARE
t WES
D(A2 + 1)
3
is LOW. When CE is HIGH: CE
BURST WRITE
t WEH
UNDEFINED
D(A2 + 1)
ADV suspends burst
X
LOW.
CY7C1482BV33, CY7C1486BV33
D(A2 + 2)
ADSC extends burst
1
is HIGH, CE
D(A2 + 3)
t ADS
2
is LOW, or CE
A3
D(A3)
t ADH
t
CY7C1480BV33
ADVS
t WES
Extended BURST WRITE
D(A3 + 1)
3
t
is HIGH.
t WEH
ADVH
D(A3 + 2)
Page 27 of 35
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