CY8C3665AXI-010 Cypress Semiconductor Corp, CY8C3665AXI-010 Datasheet - Page 88

• Manufacturer Part Number: CY8C3665AXI-010
• Description: PSOC3
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C36xxr

Specifications of CY8C3665AXI-010

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 67MHz
• Number Of I /o: 62
• Eeprom Size: 1K x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 32KB (32K x 8)
• Data Converters: A/D 2x12b, D/A 4x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: TQFP
• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C36
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 67 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 0.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 62
• Eeprom Memory Size: 1KB
• Ram Memory Size: 4KB
• Cpu Speed: 67MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.6.8 Universal Digital Blocks (UDBs)
PSoC Creator provides a library of prebuilt and tested standard digital peripherals (UART, SPI, LIN, PRS, CRC, timer, counter, PWM,
AND, OR, and so on) that are mapped to the UDB array. See the component datasheets in PSoC Creator for full AC/DC specifications,
APIs, and example code.
Table 11-52. UDB AC Specifications
11.7 Memory
Specifications are valid for –40 °C ≤ T
except where noted.
11.7.1 Flash
Table 11-53. Flash DC Specifications
Document Number: 001-53413 Rev. *J
Datapath Performance
F
F
F
PLD Performance
F
Clock to Output Performance
t
t
CLK_OUT
CLK_OUT
Parameter
MAX_TIMER
MAX_ADDER
MAX_CRC
MAX_PLD
Parameter
Erase and program voltage
Maximum frequency of 16-bit timer in
a UDB pair
Maximum frequency of 16-bit adder
in a UDB pair
Maximum frequency of 16-bit
CRC/PRS in a UDB pair
Maximum frequency of a two-pass
PLD function in a UDB pair
Propagation delay for clock in to data
out, see
Propagation delay for clock in to data
out, see
Figure
Figure
Description
Description
11-49.
11-49.
A
≤ 85 °C and T
Figure 11-49. Clock to Output Performance
PRELIMINARY
J
V
25 °C, Vddd ≥ 2.7 V
Worst-case placement, routing,
and pin selection
≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
DDD
pin
Conditions
Conditions
PSoC
®
3: CY8C36 Family Datasheet
Min
1.71
Min
–
–
–
–
–
–
Typ
20
Typ
–
–
–
–
–
–
Max
67
67
67
67
25
55
Max
5.5
Page 88 of 111
Units
MHz
MHz
MHz
MHz
Units
ns
ns
V
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