CY8CTST200-32LQXIT Cypress Semiconductor Corp, CY8CTST200-32LQXIT Datasheet - Page 228
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CY8CTST200-32LQXIT
Manufacturer Part Number
CY8CTST200-32LQXIT
Description
CY8CTST200-32LQXIT
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200-32LQXIT
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
28
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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I2C_ADDR
21.3.40 I2C_ADDR
This register holds the slave’s 7-bit address.
When hardware address compare mode is not enabled in the
above, note that the reserved bit is a grayed table cell and not described in the bit description section below. Always write
reserved bits with a value of ‘0’. For additional information, refer to the
chapter.
Bit
6:0
228
Individual Register Names and Addresses:
I2C_ADDR : 0,CAh
Access : POR
Bit Name
0,CAh
Slave Address[6:0]
Name
I
2
C Slave Address Register
7
6
Description
These seven bits hold the slave’s own device address.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
5
4
I2C_XCFG
Slave Address[6:0]
RW : 00
0,CAh
Register Definitions on page 122
3
register, this register is not in use. In the table
2
0,D0h
1
in the I2C Slave
0
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