DSPIC33FJ128GP706A-H/PT Microchip Technology, DSPIC33FJ128GP706A-H/PT Datasheet - Page 115
![16 Bit MCU/DSP 64LD 40MIPS 128KB FLASH 64 TQFP 10x10x1mm TRAY](/photos/16/3/160367/tqfp-64_sml.jpg)
DSPIC33FJ128GP706A-H/PT
Manufacturer Part Number
DSPIC33FJ128GP706A-H/PT
Description
16 Bit MCU/DSP 64LD 40MIPS 128KB FLASH 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ64GP206A-IMR.pdf
(338 pages)
Specifications of DSPIC33FJ128GP706A-H/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
64-TQFP
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 140 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
A/d Bit Size
10 bit
A/d Channels Available
13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP706A-H/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 115 of 338
- Download datasheet (3Mb)
REGISTER 7-14:
2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
C2TXIE
R/W-0
U-0
—
Unimplemented: Read as ‘0’
C2TXIE: ECAN2 Transmit Data Request Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C1TXIE: ECAN1 Transmit Data Request Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA7IE: DMA Channel 7 Data Transfer Complete Enable Status bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA6IE: DMA Channel 6 Data Transfer Complete Enable Status bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
U2EIE: UART2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1EIE: UART1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
C1TXIE
R/W-0
U-0
—
IEC4: INTERRUPT ENABLE CONTROL REGISTER 4
dsPIC33FJXXXGPX06A/X08A/X10A
W = Writable bit
‘1’ = Bit is set
DMA7IE
R/W-0
U-0
—
DMA6IE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
U2EIE
R/W-0
U-0
—
x = Bit is unknown
U1EIE
R/W-0
U-0
—
DS70593B-page 115
U-0
U-0
—
—
bit 8
bit 0
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