DSPIC33FJ64MC202-E/MM Microchip Technology, DSPIC33FJ64MC202-E/MM Datasheet - Page 428
![16 Bit MCU/DSP 40MIPS 64 KB FLASH 28 QFN-S 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ64MC202-E/MM
Manufacturer Part Number
DSPIC33FJ64MC202-E/MM
Description
16 Bit MCU/DSP 40MIPS 64 KB FLASH 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC202-E/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
ECAN Registers
ECAN Transmit/Receive Error Count Register (CiEC) ..... 257
ECAN TX/RX Buffer m Control Register (CiTRmnCON) .. 268
Electrical Characteristics................................................... 343
Enhanced CAN Module..................................................... 247
Equations
Errata .................................................................................. 13
F
Flash Program Memory....................................................... 77
DS70291E-page 428
CiCTRL1 register ...................................................... 250
CiCTRL2 register ...................................................... 251
CiEC register............................................................. 257
CiFCTRL register ...................................................... 253
CiFEN1 register ........................................................ 259
CiFIFO register ......................................................... 254
CiFMSKSEL1 register ............................................... 263
CiFMSKSEL2 register ............................................... 264
CiINTE register ......................................................... 256
CiINTF register.......................................................... 255
CiRXFnEID register .................................................. 263
CiRXFnSID register .................................................. 262
CiRXFUL1 register .................................................... 266
CiRXFUL2 register .................................................... 266
CiRXMnEID register.................................................. 265
CiRXMnSID register.................................................. 265
CiRXOVF1 register ................................................... 267
CiRXOVF2 register ................................................... 267
CiTRmnCON register ................................................ 268
CiVEC register .......................................................... 252
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1) ......... 58
ECAN1 Register Map (C1CTRL1.WIN = 0) ................ 58
ECAN1 Register Map (C1CTRL1.WIN = 1) ................ 59
Frame Types ............................................................. 247
Modes of Operation .................................................. 249
Overview ................................................................... 247
Acceptance Filter Enable Register (CiFEN1)............ 259
Acceptance Filter Extended Identifier Register n (CiRXF-
Acceptance Filter Mask Extended Identifier Register n
Acceptance Filter Mask Standard Identifier Register n
Acceptance Filter Standard Identifier Register n (CiRXF-
Baud Rate Configuration Register 1 (CiCFG1) ......... 257
Baud Rate Configuration Register 2 (CiCFG2) ......... 258
Control Register 1 (CiCTRL1) ................................... 250
Control Register 2 (CiCTRL2) ................................... 251
FIFO Control Register (CiFCTRL) ............................ 253
FIFO Status Register (CiFIFO) ................................. 254
Filter 0-3 Buffer Pointer Register (CiBUFPNT1) ....... 259
Filter 12-15 Buffer Pointer Register (CiBUFPNT4) ... 261
Filter 15-8 Mask Selection Register (CiFMSKSEL2). 264
Filter 4-7 Buffer Pointer Register (CiBUFPNT2) ....... 260
Filter 7-0 Mask Selection Register (CiFMSKSEL1)... 263
Filter 8-11 Buffer Pointer Register (CiBUFPNT3) ..... 260
Interrupt Code Register (CiVEC) .............................. 252
Interrupt Enable Register (CiINTE) ........................... 256
Interrupt Flag Register (CiINTF) ............................... 255
Receive Buffer Full Register 1 (CiRXFUL1).............. 266
Receive Buffer Full Register 2 (CiRXFUL2).............. 266
Receive Buffer Overflow Register 2 (CiRXOVF2)..... 267
Receive Overflow Register (CiRXOVF1) .................. 267
AC ..................................................................... 354, 394
Device Operating Frequency .................................... 146
Control Registers ........................................................ 78
Operations .................................................................. 78
nEID)................................................................. 263
(CiRXMnEID) .................................................... 265
(CiRXMnSID) .................................................... 265
nSID)................................................................. 262
Flexible Configuration ....................................................... 321
H
High Temperature Electrical Characteristics .................... 391
I
I/O Ports............................................................................ 163
I
In-Circuit Debugger........................................................... 327
In-Circuit Emulation .......................................................... 321
In-Circuit Serial Programming (ICSP)....................... 321, 327
Input Capture .................................................................... 203
Input Change Notification ................................................. 164
Instruction Addressing Modes ............................................ 67
Instruction Set
Instruction-Based Power-Saving Modes........................... 157
Internal RC Oscillator
Internet Address ............................................................... 423
Interrupt Control and Status Registers ............................... 95
Interrupt Setup Procedures............................................... 132
Interrupt Vector Table (IVT) ................................................ 91
Interrupts Coincident with Power Save Instructions ......... 158
J
JTAG Boundary Scan Interface ........................................ 321
JTAG Interface.................................................................. 327
M
Memory Organization ......................................................... 39
Microchip Internet Web Site.............................................. 423
Modes of Operation
Modulo Addressing ............................................................. 69
2
C
Programming Algorithm .............................................. 81
RTSP Operation ......................................................... 78
Table Instructions ....................................................... 77
Parallel I/O (PIO) ...................................................... 163
Write/Read Timing .................................................... 164
Operating Modes ...................................................... 233
Registers .................................................................. 233
Registers .................................................................. 204
File Register Instructions ............................................ 67
Fundamental Modes Supported ................................. 68
MAC Instructions ........................................................ 68
MCU Instructions ........................................................ 67
Move and Accumulator Instructions............................ 68
Other Instructions ....................................................... 68
Overview................................................................... 334
Summary .................................................................. 331
Idle ............................................................................ 158
Sleep ........................................................................ 157
Use with WDT........................................................... 326
IECx ............................................................................ 95
IFSx ............................................................................ 95
INTCON1 .................................................................... 95
INTCON2 .................................................................... 95
IPCx ............................................................................ 95
Initialization ............................................................... 132
Interrupt Disable ....................................................... 132
Interrupt Service Routine .......................................... 132
Trap Service Routine ................................................ 132
Disable...................................................................... 249
Initialization ............................................................... 249
Listen All Messages.................................................. 249
Listen Only................................................................ 249
Loopback .................................................................. 249
Normal Operation ..................................................... 249
Applicability................................................................. 70
Operation Example ..................................................... 69
© 2011 Microchip Technology Inc.
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