DSPIC33FJ64MC202-E/MM Microchip Technology, DSPIC33FJ64MC202-E/MM Datasheet - Page 5
![16 Bit MCU/DSP 40MIPS 64 KB FLASH 28 QFN-S 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ64MC202-E/MM
Manufacturer Part Number
DSPIC33FJ64MC202-E/MM
Description
16 Bit MCU/DSP 40MIPS 64 KB FLASH 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC202-E/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 5 of 436
- Download datasheet (6Mb)
Communication Modules:
• 4-wire SPI (up to two modules):
• I
• UART (up to two modules):
• Enhanced CAN (ECAN™ module) 2.0B active:
• Parallel Master Slave Port (PMP/EPSP):
• Programmable Cyclic Redundancy Check (CRC):
© 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
- Framing supports I/O interface to simple
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
- Full Multi-Master Slave mode support
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN 2.0 bus support
- IrDA
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
- Up to eight transmit and up to 32 receive buffers
- 16 receive filters and three masks
- Loopback, Listen Only and Listen All
- Messages modes for diagnostics and bus
- Wake-up on CAN message
- Automatic processing of Remote
- FIFO mode using DMA
- DeviceNet™ addressing support
- Supports 8-bit or 16-bit data
- Supports 16 address lines
- Programmable bit length for the CRC
- 8-deep, 16-bit or 16-deep, 8-bit FIFO for data
2
C™:
codecs
sampling modes
monitoring
Transmission Requests
generator polynomial (up to 16-bit length)
input
®
encoding and decoding in hardware
Packaging:
• 28-pin SDIP/SOIC/QFN-S
• 44-pin TQFP/QFN
Note:
See
features per device.
Table 1
for the exact peripheral
DS70291E-page 5
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