EVAL-AD5560EBUZ Analog Devices Inc, EVAL-AD5560EBUZ Datasheet - Page 2

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EVAL-AD5560EBUZ

Manufacturer Part Number
EVAL-AD5560EBUZ
Description
Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD5560EBUZ

Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Utilized Ic / Part
AD5560
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Embedded
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5560
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Absolute Maximum Ratings.......................................................... 15
Pin Configuration and Function Descriptions........................... 16
Typical Performance Characteristics ........................................... 18
Terminology .................................................................................... 26
Theory of Operation ...................................................................... 27
Timing Characteristics .............................................................. 13
Timing Diagrams........................................................................ 13
Thermal Resistance .................................................................... 15
ESD Caution................................................................................ 15
Force Amplifier........................................................................... 27
DAC Reference Voltage (VREF)............................................... 27
Open-Sense Detect (OSD) Alarm and Clamp ....................... 27
Device Under Test Ground (DUTGND)................................. 27
GPO.............................................................................................. 28
Comparators................................................................................ 28
Current Clamps .......................................................................... 28
Short-Circuit Protection............................................................ 28
Guard Amplifier ......................................................................... 28
Compensation Capacitors ......................................................... 28
Current Range Selection............................................................ 29
High Current Ranges ................................................................. 29
Ideal Sequence for Gang Mode................................................. 30
Compensation for Gang Mode ................................................. 30
System Force/Sense Switches .................................................... 30
Die Temperature Sensor and Thermal Shutdown ................. 31
Measure Output (MEASOUT) ................................................. 31
V
Force Amplifier Stability............................................................ 34
Poles and Zeros in a Typical System ........................................ 35
Minimizing the Number of External Compensation
Components ................................................................................ 35
Extra Poles and Zeros in the AD5560...................................... 35
MID
Voltage ................................................................................ 31
Rev. C | Page 2 of 60
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Serial Interface ................................................................................ 42
Control Registers ............................................................................ 44
Outline Dimensions ....................................................................... 60
Compensation Strategies........................................................... 36
Optimizing Performance for a Known Capacitor Using
Autocompensation Mode.......................................................... 36
Adjusting the Autocompensation Mode ................................. 37
Dealing with Parallel Load Capacitors .................................... 37
DAC Levels.................................................................................. 37
Force and Comparator DACs ................................................... 37
Clamp DACs ............................................................................... 37
OSD DAC .................................................................................... 38
DUTGND DAC.......................................................................... 38
Offset DAC.................................................................................. 38
Offset and Gain Registers.......................................................... 38
Reference Selection .................................................................... 39
Choosing AV
Choosing HCAV
Power Dissipation....................................................................... 39
Package Composition and Maximum Vertical Force............ 40
Slew Rate Control....................................................................... 40
SPI Interface ................................................................................ 42
SPI Write Mode .......................................................................... 42
SDO Output ................................................................................ 42
RESET Function ......................................................................... 42
BUSY Function ........................................................................... 42
LOAD Function.......................................................................... 42
Register Update Rates ................................................................ 43
DPS and DAC Addressing ........................................................ 44
Readback Mode .......................................................................... 55
DAC Readback............................................................................ 55
Power-On Default ...................................................................... 55
Using the HCAV
Power Supply Sequencing ......................................................... 57
Required External Components............................................... 58
Power Supply Decoupling ......................................................... 59
Ordering Guide .......................................................................... 60
DD
/AV
DD
SS
x and HCAV
x and HCAV
SS
Power Supply Rails ............................... 39
DD
SS
x Supplies .......................... 57
x Supply Rails ................... 39
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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