KSZ8842-32MVLI Micrel Inc, KSZ8842-32MVLI Datasheet - Page 7

• Manufacturer Part Number: KSZ8842-32MVLI
• Description: 2-Port Ethernet Switch/Repeater + Generic (32-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-32MVLI

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1635 - BOARD EVALUATION KSZ8842-16MVL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3270

MIB (Management Information Base) Counters................................................................................................ 116
Static MAC Address Table .................................................................................................................................. 119
Dynamic MAC Address Table ............................................................................................................................. 120
VLAN Table ........................................................................................................................................................... 121
Absolute Maximum Ratings
Operating Ratings
Electrical Characteristics
Timing Specifications .......................................................................................................................................... 124
Selection of Isolation Transformers................................................................................................................... 135
Selection of Reference Crystal ........................................................................................................................... 135
Package Information ............................................................................................................................................ 136
Acronyms and Glossary...................................................................................................................................... 139
Micrel, Inc.
October 2007
Bank 48 Port 1 VID Control Register (0x04): P1VIDCR.......................................................................................................101
Bank 48 Port 1 Control Register 3 (0x06): P1CR3 ..............................................................................................................101
Bank 48 Port 1 Ingress Rate Control Register (0x08): P1IRCR...........................................................................................102
Bank 48 Port 1 Egress Rate Control Register (0x0A): P1ERCR .........................................................................................104
Bank 49 Port 1 PHY Special Control/Status, LinkMD (0x00): P1SCSLMD..........................................................................106
Bank 49 Port 1 Control Register 4 (0x02): P1CR4 ..............................................................................................................107
Bank 49 Port 1 Status Register (0x04): P1SR .....................................................................................................................108
Bank 50 Port 2 Control Register 1 (0x00): P2CR1 ..............................................................................................................109
Bank 50 Port 2 Control Register 2 (0x02): P2CR2 ..............................................................................................................109
Bank 50 Port 2 VID Control Register (0x04): P2VIDCR.......................................................................................................109
Bank 50 Port 2 Control Register 3 (0x06): P2CR3 ..............................................................................................................109
Bank 50 Port 2 Ingress Rate Control Register (0x08): P2IRCR...........................................................................................109
Bank 50 Port 2 Egress Rate Control Register (0x0A): P2ERCR .........................................................................................109
Bank 51 Port 2 PHY Special Control/Status, LinkMD (0x00): P2SCSLMD..........................................................................110
Bank 51 Port 2 Control Register 4 (0x02): P2CR4 ..............................................................................................................111
Bank 51 Port 2 Status Register (0x04): P2SR .....................................................................................................................113
Bank 52 Host Port Control Register 1 (0x00): P3CR1 .........................................................................................................114
Bank 52 Host Port Control Register 2 (0x02): P3CR2 .........................................................................................................114
Bank 52 Host Port VID Control Register (0x04): P3VIDCR .................................................................................................115
Bank 52 Host Port Control Register 3 (0x06): P3CR3 .........................................................................................................115
Bank 52 Host Port Ingress Rate Control Register (0x08): P3IRCR .....................................................................................115
Bank 52 Host Port Egress Rate Control Register (0x0A): P3ERCR ....................................................................................115
Banks 53 – 63: Reserved ....................................................................................................................................................115
Format of “All Ports Dropped Packet” MIB Counters ...........................................................................................................117
Additional MIB Information...................................................................................................................................................118
Static MAC Table Lookup Examples: ..................................................................................................................................119
Dynamic MAC Address Lookup Example: ...........................................................................................................................120
VLAN Table Lookup Examples:...........................................................................................................................................121
Asynchronous Timing without using Address Strobe (ADSN = 0) .......................................................................................124
Asynchronous Timing using Address Strobe (ADSN)..........................................................................................................125
Asynchronous Timing using DATACSN (KSZ8842-32MQL/MVL device only) ....................................................................126
Address Latching Timing for All Modes ...............................................................................................................................127
Synchronous Timing in Burst Write (VLBUSN = 1)..............................................................................................................128
Synchronous Timing in Burst Read (VLBUSN = 1)..............................................................................................................129
Synchronous Write Timing (VLBUSN = 0)...........................................................................................................................130
Synchronous Read Timing (VLBUSN = 0)...........................................................................................................................131
EEPROM Timing .................................................................................................................................................................132
Auto Negotiation Timing ......................................................................................................................................................133
Reset Timing .......................................................................................................................................................................134
(1)
............................................................................................................................................. 122
(1)
................................................................................................................................. 123
(1)
............................................................................................................................. 122
7
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9