KSZ8851-16MLL TR Micrel Inc, KSZ8851-16MLL TR Datasheet - Page 59
KSZ8851-16MLL TR
Manufacturer Part Number
KSZ8851-16MLL TR
Description
Single Ethernet Port + Generic (16-bit) Bus Interface( )
Manufacturer
Micrel Inc
Datasheet
1.KSZ8851-16MLL_TR.pdf
(79 pages)
Specifications of KSZ8851-16MLL TR
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant
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Indirect Access Control Register (0xC8 – 0xC9): IACR
This register contains the indirect control for the MIB counter (Write IACR triggers a command. Read access is
determined by bit 12).
0xCA – 0xCF: Reserved
Indirect Access Data Low Register (0xD0 – 0xD1): IADLR
This register contains the indirect data (low word) for MIB counter.
Indirect Access Data High Register (0xD2 – 0xD3): IADHR
This register contains the indirect data (high word) for MIB counter.
Power Management Event Control Register (0xD4 – 0xD5): PMECR
This register is used to control the KSZ8851-16MLL power management event, capabilities and status.
August 2009
Micrel, Inc.
Bit
15-12
11-10
9
8
7-0
Bit
15-13
12
11-10
9-5
4-0
Bit
15-0
Bit
15-0
Bit
15
Default Value
-
0x0
0x0
0x0
-
Default
0x0
0x2
0x35
Default
0x0
0x0
0x00
Default
0x0000
Default
0x0000
R/W
RO
R/W
RW
RW
RW
R/W
RW
R/W
RW
RW
RW
RW
RW
R/W
RW
R/W
RW
Description
Reserved.
Reserved.
LEDSEL0
This bit sets the LEDSEL0 selection for P1LED1 and P1LED0. PHY port LED indicators,
defined as below:
Reserved.
Reserved.
Description
Reserved.
Read Enable.
1 = Read cycle is enabled (MIB counter will clear after read).
0 = No operation.
Table Select
00 = reserved.
01 = reserved.
10 = reserved.
11 = MIB counter selected.
Reserved.
Indirect Address
Bit 4-0 of indirect address for 32 MIB counter locations.
Description
Indirect Low Word Data
Bit 15-0 of indirect data.
Description
Indirect High Word Data
Bit 31-16 of indirect data.
Description
Reserved.
P1LED1
P1LED0
LINK/ACT
100BT
59
0
LEDSEL0 (bit9)
LINK
ACT
1
KSZ8851-16MLL/MLLI
M9999-083109-2.0
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