KSZ8997 Micrel Inc, KSZ8997 Datasheet - Page 19

• Manufacturer Part Number: KSZ8997
• Description: 8 Port 10/100 Switch With PHY And Frame Buffers (Lead Free)
• Manufacturer: Micrel Inc

Specifications of KSZ8997

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Fiber Support: No
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1043

IPv4 DSCP Method
This is another per frame way of determining outbound priority. The DSCP (Differentiated Services Code Point– RFC#2474)
method uses the TOS field in the IP header to determine high and low priority on a per code point basis. Each fully decoded
code point can have either a high or low priority. A larger spectrum of priority flows can be defined with this larger code space.
More specific to implementation, the most significant 6 bits of the TOS field are fully decoded into 64 possibilities, and the
singular code that results is compared against the corresponding bit in the DSCP register. If the register bit is a 1, the priority
is high and if 0, the priority is low.
Other Priority Considerations
When setting up the priority scheme, one should consider other available controls to regulate the traffic. One of these is Priority
Control Scheme (register 2 bits 2-3) which controls the interleaving of high and low priority frames. Options allow from a 2:1
ratio up to a setting that sends all the high priority first. This setting controls all ports globally. Another global feature is Priority
Buffer Reserve (register 2 bit 1). If this is set, there is a 6KB (10%) buffer dedicated to high priority traffic, otherwise if cleared
the buffer is shared between all traffic.
On an individual port basis there are controls that enable DSCP, 802.1p, port based and high/low priority queues. These are
contained in registers 4-11 bits 5-3 and 0. It should be noted that there is a special pin that generally enables the 802.1p priority
for all ports (pin 60). When this pin is active (high) all ports will have the 802.1p priority enabled unless specifically disabled
by EEPROM programming (bit 4 of registers 4-11). Default high priority is a value of '100' and above in the VLAN tag with low
priority being a value of '011' and below.
The table below briefly summarizes priority features. For more detailed settings see “EEPROM Memory Map” section.
August 2003
KS8997
Register(s)
2
2
4-11
4-11
40-47
4-11
3
4-11
Bit(s)
3-2
1
0
5
7-0
4
7-0
3
Global/Port
Global
Global
Port
Port
Global
Port
Global
Port
Description
General
Priority Control Scheme: Transmit buffer high/low interleave control
Priority Buffer Reserve: Reserves 6KB of the buffer for high priority traffic
Enable Port Queue Split: Splits the transmit queue on the desired port for high and low
priority traffic
DSCP Priority
Enable Port DSC: Looks at DSCP field in IP header to decide high or low priority
DSCP Priority Points: Fully decoded 64 bit register used to determine priority from DSCP
field (6 bits) in the IP header
802.1p Priority
Enable Port 802.1p Priority: Uses the 802.1p priority tag (3 bits) to determine frame
priority
Priority Classification: Determines which tag values have high priority
Per Port Priority
Enable Port Priority: Determines which ports have high priority traffic
Table 1. Priority Control
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KS8997
Micrel