MT9T031C12STC Aptina LLC, MT9T031C12STC Datasheet - Page 16

• Manufacturer Part Number: MT9T031C12STC
• Description: IC SENSOR IMAGE COLOR 48CLCC
• Manufacturer: Aptina LLC
• Series: Micron®DigitalClarity®r
• Type: CMOS Imagingr

Specifications of MT9T031C12STC

• Pixel Size: 3.2µm x 3.2µm
• Active Pixel Array: 2048H x 1536V
• Frames Per Second: 12 ~ 93
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 48-CLCC
• Brief Features: Superior Low Light Performance, Programmable Controls, Low Dark Current, High Frame Rate
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +60°C
• Ic Function: Digital Image Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 557-1450 - KIT HEAD BOARD FOR MT9T031557-1451 - KIT DEV FOR MT9T031
• Lead Free Status / Rohs Status: Compliant
• Other names: 557-1452

Sensor Core Register Descriptions
Table 6:
PDF: 3682685119/Source: 9830567334
MT9T031_DS - Rev.E 5/11 EN
Reg. #
R0x00
R0x01
R0x02
R0x03
R0x04
R0x05
R0x06
R0x07
R0x07
R0
R1
R2
R3
R4
R5
R6
R7
R7
15:0
Chip version.
15:0
The first row to be read out, excluding any dark rows that may be read. To window the image down, set this register to the
starting “Y” value. Setting a value less than 20 is not recommended because the dark rows should be read using R0x22.
15:0
The first column to be read out, excluding dark columns that may be read. To window the image down, set this register to the
starting X value. Setting a value below 96 is not recommended because readout of dark columns should be controlled by
R0x22.
15:0
Number of rows in the image to be read out, excluding any dark rows or border rows that may be read. The minimum
supported value is 2.
15:0
Number of columns in the image to be read out, excluding any dark columns or border columns that may be read. The
minimum supported value is 17.
15:0
15:0
Vertical Blank—default = 0x0019 (25 rows). Minimum value = 0x0003 (3).
15:0
15
14
13:9
8
7
6
5:4
3
2
1
0
This register controls various features of the output format for the sensor.
Horizontal Blank—default = 0x008E (142 pixels). Minimum value = 0x0015 (21).
Core Registers
Bits
0x1621
0x0014
0x0020
0x05FF
0x07FF
0x008E
0x0019
0x0002
0x0000
0x0000
X
0x0000
X
0x0000
0x0000
0x0000
0x0000
0x0001
0x0000
Default
Chip Version (RO)
Row Start (RW)
Column Start (RW)
Row Size (RW)
Column Size (RW)
Horizontal Blanking (RW)
Vertical Blanking (RW)
Output Control (RW)
Reserved
Reserved
Reserved
Reserved
Reserved
Override pixel data
Override pixel data.
0 = normal operation.
1 = output programmed test data (see R0x32). First valid columns will output contents of test data
register; second columns will output inverted data. Third columns will output noninverted data,
fourth inverted, etc.
Reserved
Reserved
Reserved
Chip Enable
Chip Enable.
1 = normal operation.
0 = sensor readout is stopped and analog control signals are put in a state which draws minimal
power.
Sync changes
Synchronize changes.
0 = normal operation, update changes to registers that affect image brightness (integration
time, shutter delay, gain, horizontal and vertical blank, window size, row/column skip, or row
mirror) at the next frame boundary. 1 = do not update any changes to these settings until this bit
is returned to “0.”
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MT9T031: 1/2-Inch 3-Mp Digital Image Sensor
Name
Sensor Core Register Descriptions
©2006 Aptina Imaging Corporation. All rights reserved.