MT9P401I12STC Aptina LLC, MT9P401I12STC Datasheet - Page 15

• Manufacturer Part Number: MT9P401I12STC
• Description: SENSOR IMAGE CMOS 5MP 48LCC
• Manufacturer: Aptina LLC
• Type: CMOS Imagingr
• Series: DigitalClarity®r

Specifications of MT9P401I12STC

• Pixel Size: 2.2µm x 2.2µm
• Active Pixel Array: 2592H x 1944V
• Frames Per Second: 60
• Voltage - Supply: 2.6 V ~ 3.1 V
• Package / Case: 48-iLCC
• Sensor Image Color Type: Monochrome
• Sensor Image Size: 2592x1944Pixels
• Operating Supply Voltage (typ): 1.8/2.8V
• Operating Supply Voltage (max): 3.1V
• Operating Temp Range: -30C to 70C
• Package Type: ILCC
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1263; MT9P401I12STC; Q3412742

Frame Time
Table 8:
Table 9:
PDF: 09005aef82acb06f/Source: 09005aef81a4a477
MT9P401_DS_2 - Rev. B 9/07 EN
Parameter
fps
t
t
t
Default
t
HDTV
W
H
SW
HB
VB
HB
VB
t
FRAME
ROW
ROW_
ROW_
PIXCLK
MIN
MIN
Frame Time
HB
Name
Frame Rate
Frame Time
Row Time
Row Time
Row Time
Output Image Width
Output Image Height
Shutter Width
Horizontal Blanking
Vertical Blanking
Minimum Horizontal
Blanking
Minimum Vertical
Blanking
Pixclk Period
MIN
Values for Row_bin vs. Column_bin Settings
The pixel clock (PIXCLK) represents the time needed to sample 1 pixel from the array,
and is typically equal to 1 EXTCLK period. The sensor outputs data at the maximum rate
of 1 pixel per PIXCLK. One row time (
row to the first pixel output in the next row. The row time and frame time are defined by
equations in Table 8.
The minimum horizontal blanking (HB
Column_Bin settings are shown in Table 9.
Row_
bin
0
1
3
Micron Confidential and Proprietary
2 × ceil((Column_Size + 1) / (2 × (Column_Skip + 1)))
2 × ceil((Row_Size + 1) / (2 × (Row_Skip + 1)))
2 ×
2 ×
2 ×
max (1, (2 * 16 × Shutter_Width_Upper)
t
t
t
346 × (Row_Bin + 1) + 64 + (W
PIXCLK x max(((W/2) + max(HB, HB
PIXCLK x max(((W/2) + max(HB, HB
PIXCLK x max(((W/2) + max(HB, HB
(41 + 346 x (Row_Bin+1) + 99))
(41 + 346 x (Row_Bin+1) + 99))
(41 + 186 x (Row_Bin+1) + 99))
(H + max(VB, VB
1488
450
796
MT9P401: 1/2.5-Inch 5Mp Digital Image Sensor
+ Shutter_Width_Lower)
0
Column_bin (W
15
Horizontal_Blank + 1
max (8, SW - H) + 1
Vertical_Blank + 1
Equation
1/
1/
t
f
t
FRAME
PIXCLK
ROW) is the period from the first pixel output in a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
MIN
1468
430
776
DC
) values for various Row_Bin and
1
)) ×
)
t
ROW
DC
/ 2)
MIN
MIN
MIN
1458
420
766
)),
)),
)),
3
Output Data Timing
©2007 Micron Technology, Inc. All rights reserved.
Default Timing at
EXTCLK = 96 MHz
14
71.66ms
36.38µs
36.38µs
24.4µs
2592 PIXCLK
1944 rows
1943 rows
1 PIXCLK
26 rows
450 PIXCLK
9 rows
10.42ns