MT9P401I12STC Aptina LLC, MT9P401I12STC Datasheet - Page 25

• Manufacturer Part Number: MT9P401I12STC
• Description: SENSOR IMAGE CMOS 5MP 48LCC
• Manufacturer: Aptina LLC
• Type: CMOS Imagingr
• Series: DigitalClarity®r

Specifications of MT9P401I12STC

• Pixel Size: 2.2µm x 2.2µm
• Active Pixel Array: 2592H x 1944V
• Frames Per Second: 60
• Voltage - Supply: 2.6 V ~ 3.1 V
• Package / Case: 48-iLCC
• Sensor Image Color Type: Monochrome
• Sensor Image Size: 2592x1944Pixels
• Operating Supply Voltage (typ): 1.8/2.8V
• Operating Supply Voltage (max): 3.1V
• Operating Temp Range: -30C to 70C
• Package Type: ILCC
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1263; MT9P401I12STC; Q3412742

Register Description
Table 13:
PDF: 09005aef82acb06f/Source: 09005aef81a4a477
MT9P401_DS_2 - Rev. B 9/07 EN
R0x000
R0x001
R0x002
R0x003
R0x004
R0x005
R0x006
Reg. #
R0:0
R1:0
R2:0
R3:0
R4:0
R5:0
R6:0
Chip version.
The Y coordinate of the upper-left corner of the FOV. If this register is set to an odd value, the next lower
even value will be used. Writes are synchronized to frame boundaries. Affected by Synchronize_Changes.
Causes a Bad Frame if written. Legal values: [0, 2004], even.
The X coordinate of the upper-left corner of the FOV. The value will be rounded down to the nearest multiple
of 2 times the column bin factor. Writes are synchronized to frame boundaries. Affected by
Synchronize_Changes. Legal values: [0, 2750], even.
Note: Set Column_Start such that it is in the form shown below, where n is an integer:
no bin
Bin 2x
Bin 4x
The height of the FOV minus one. If this register is set to an even value, the next higher odd value will be
used. Writes are synchronized to frame boundaries. Affected by Synchronize_Changes.
Causes a Bad Frame if written. Legal values: [1, 2005], odd.
The width of the field of view minus one. If this register is set to an even value, the next higher odd value will
be used. In other words, it should be (2*n*(Column_Bin + 1) - 1) for some integer n. Writes are synchronized to
frame boundaries. Affected by Synchronize_Changes. Causes a Bad Frame if written.
Legal values: [1, 2751], odd.
Extra time added to the end of each row, in pixel clocks. Incrementing this register will increase exposure and
decrease frame rate. Setting a value less than the minimum will use the minumum horizontal blank. The
minimum horizontal blank depends on the mode of the sensor. Writes are synchronized to frame boundaries.
Affected by Synchronize_Changes. Causes a Bad Frame if written. Legal values: [0, 4095].
Extra time added to the end of each frame in rows minus one. Incrementing this register will decrease frame
rate, but not affect exposure. Setting a value less than the minimum will use the minimum vertical blank.
Writes are synchronized to frame boundaries. Affected by Synchronize_Changes. Legal values: [8, 2047].
15:0
15:0
15:0
15:0
15:0
15:0
15:0
Bits
15:8
7:4
3:0
Register Description
Default
0x0A1F
0x1801
0x0036
0x0010
0x0797
0x0000
0x0019
RO
RO
RO
Mirror_Column = 0
Table 13 lists sensor register descriptions.
8n
16n
4n
Name
Chip Version (RO)
Part ID
Two-digit BCD value typically derived from the reticle ID code.
Legal values: [0, 255].
Analog Revision
Constant value incremented with each mask change for the same Part ID.
Legal values: [0, 15].
Digital Revision
Constant value incremented with each digital functionality change for the same Part ID.
Legal values: [0, 15].
Row Start (RW)
Column Start (RW)
Row Size (RW)
Column Size (RW)
Horizontal Blank (RW)
Vertical Blank (RW)
Micron Confidential and Proprietary
Mirror_Column = 1
MT9P401: 1/2.5-Inch 5Mp Digital Image Sensor
25
16n + 8
4n + 2
8n + 4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
Registers