LTC3703IGN-5 Linear Technology, LTC3703IGN-5 Datasheet - Page 18

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LTC3703IGN-5

Manufacturer Part Number
LTC3703IGN-5
Description
IC,SMPS CONTROLLER,VOLTAGE-MODE,CMOS,SSOP,16PIN,PLASTIC
Manufacturer
Linear Technology
Datasheet

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LTC3703
APPLICATIO S I FOR ATIO
Bottom MOSFET Source Supply (BGRTN)
The bottom gate driver, BG, switches from DRV
where BGRTN can be a voltage between ground and –5V.
Why not just keep it simple and always connect BGRTN to
ground? In high voltage switching converters, the switch
node dV/dt can be many volts/ns, which will pull up on the
gate of the bottom MOSFET through its Miller capacitance.
If this Miller current, times the internal gate resistance of
the MOSFET plus the driver resistance, exceeds the thresh-
old of the FET, shoot-through will occur. By using a nega-
tive supply on BGRTN, the BG can be pulled below ground
when turning the bottom MOSFET off. This provides a few
extra volts of margin before the gate reaches the turn-on
threshold of the MOSFET. Be aware that the maximum
voltage difference between DRV
for example, V
DRV
Current Limit Programming
Programming current limit on the LTC3703 is straight
forward. The I
maximum allowable voltage drop across the bottom
MOSFET. The voltage across the MOSFET is set by its on-
resistance and the current flowing in the inductor, which
is the same as the output current. The LTC3703 current
limit circuit inverts the negative voltage across the MOSFET
before comparing it to the voltage at I
current limit to be set with a positive voltage.
To set the current limit, calculate the expected voltage
drop across the bottom MOSFET at the maximum desired
current and maximum junction temperature:
where δ is explained in the MOSFET Selection section.
V
internal 12µA pull-up and an external resistor:
The current limit value should be checked to ensure that
I
the maximum rated current of the inductor and bottom
MOSFET. The minimum value of current limit generally
occurs with the largest V
perature, conditions that cause the largest power loss in
18
LIMIT(MIN)
PROG
V
R
PROG
IMAX
CC
is then programmed at the I
pin is now 13V instead of 15V.
= V
= (I
> I
PROG
OUT(MAX)
LIMIT
MAX
BGRTN
/12µA
)(R
pin sets the current limit by setting the
U
DS(ON)
and also that I
= –2V, the maximum voltage on
IN
U
)(1 + δ)
at the highest ambient tem-
CC
and BGRTN is 15V. If,
W
LIMIT(MAX)
MAX
MAX
pin using the
, allowing the
CC
is less than
U
to BGRTN
the converter. Note that it is important to check for self-
consistency between the assumed MOSFET junction tem-
perature and the resulting value of I
MOSFET switches.
Caution should be used when setting the current limit
based upon the R
current limit is determined by the minimum MOSFET on-
resistance. Data sheets typically specify nominal and
maximum values for R
reasonable assumption is that the minimum R
the same amount below the typical value as the maximum
lies above it. Consult the MOSFET manufacturer for further
guidelines.
For best results, use a V
500mV. Values outside of this range may give less accu-
rate current limit. The current limit can also be disabled by
floating the I
FEEDBACK LOOP/COMPENSATION
Feedback Loop Types
In a typical LTC3703 circuit, the feedback loop consists of
the modulator, the external inductor, the output capacitor
and the feedback amplifier with its compensation network.
All of these components affect loop behavior and must be
accounted for in the loop compensation. The modulator
consists of the internal PWM generator, the output MOSFET
drivers and the external MOSFETs themselves. From a
feedback loop point of view, it looks like a linear voltage
transfer function from COMP to SW and has a gain roughly
equal to the input voltage. It has fairly benign AC behavior
at typical loop compensation frequencies with significant
phase shift appearing at half the switching frequency.
The external inductor/output capacitor combination makes
a more significant contribution to loop behavior. These
components cause a second order LC roll off at the output,
with the attendant 180° phase shift. This rolloff is what
filters the PWM waveform, resulting in the desired DC
output voltage, but the phase shift complicates the loop
compensation if the gain is still higher than unity at the
pole frequency. Eventually (usually well above the LC pole
frequency), the reactance of the output capacitor will
approach its ESR and the rolloff due to the capacitor
MAX
pin.
DS(ON)
PROG
DS(ON)
of the MOSFETs. The maximum
voltage between 100mV and
, but not a minimum. A
LIMIT
which heats the
DS(ON)
3703fa
lies

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