FDC6321C Fairchild Semiconductor, FDC6321C Datasheet

MOSFET N/P-CH DUAL 25V SSOT-6

FDC6321C

Manufacturer Part Number
FDC6321C
Description
MOSFET N/P-CH DUAL 25V SSOT-6
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FDC6321C

Fet Type
N and P-Channel
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
450 mOhm @ 500mA, 4.5V
Drain To Source Voltage (vdss)
25V
Current - Continuous Drain (id) @ 25° C
680mA, 460mA
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
2.3nC @ 5V
Input Capacitance (ciss) @ Vds
50pF @ 10V
Power - Max
700mW
Mounting Type
Surface Mount
Package / Case
6-SSOT, SuperSOT-6
Configuration
Dual
Transistor Polarity
N and P-Channel
Resistance Drain-source Rds (on)
0.45 Ohm @ 4.5 V @ N Channel
Forward Transconductance Gfs (max / Min)
1.45 S, 0.8 S
Drain-source Breakdown Voltage
25 V
Gate-source Breakdown Voltage
8 V @ N Channel or - 8 V @ P Channel
Continuous Drain Current
0.68 A @ N Channel or 0.46 A @ P Channel
Power Dissipation
900 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Continuous Drain Current Id
460mA
Drain Source Voltage Vds
25V
On Resistance Rds(on)
1.1ohm
Rds(on) Test Voltage Vgs
4.5V
Threshold Voltage Vgs Typ
800mV
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDC6321C

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© 1999 Fairchild Semiconductor Corporation
These dual N & P Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance.
especially for low voltage applications as a replacement for
digital transistors in load switching applications. Since bias
resistors are not required this dual digital FET can replace
several digital transistors with different bias resistors.
FDC6321C
Dual N & P Channel , Digital FET
General Description
Symbol
V
V
I
P
T
ESD
THERMAL CHARACTERISTICS
R
R
D
Absolute Maximum Ratings
J
DSS
GSS
, I
D
,T
JA
JC
O
SOT-23
STG
, V
, V
CC
IN
Parameter
Drain-Source Voltage, Power Supply Voltage
Gate-Source Voltage,
Drain/Output Current
Maximum Power Dissipation
Operating and Storage Tempature Ranger
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
SuperSOT
D1
SuperSOT
This
Mark:.321
S1
TM
-6
device has been designed
D2
TM
-6
- Continuous
- Pulsed
G1
T
A
= 25
S2
SuperSOT
o
C unless other wise noted
G2
(Note 1a)
(Note 1b)
(Note 1)
(Note 1a)
TM
-8
Features
SO-8
N-Ch 25 V, 0.68 A, R
P-Ch -25 V, -0.46 A, R
Very low level gate drive requirements allowing direct
operation in 3 V circuits. V
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple dual NPN & PNP digital transistors.
N-Channel
0.68
25
8
2
4
6
5
-55 to 150
140
0.9
0.7
60
6
SOT-223
DS(ON)
DS(ON)
GS(th)
= 0.45
P-Channel
= 1.1
-0.46
< 1.0V.
-1.5
-25
-8
3
2
1
@ V
@ V
April 1999
SOIC-16
GS
GS
= -4.5 V.
= 4.5 V
FDC6321C.RevB
Units
°C/W
°C/W
kV
W
°C
V
V
A

Related parts for FDC6321C

FDC6321C Summary of contents

Page 1

... Replace multiple dual NPN & PNP digital transistors. TM SO-8 SuperSOT - unless other wise noted A N-Channel 25 8 0.68 2 (Note 1a) (Note 1b) (Note 1a) (Note 1) April 1999 = 0. 4.5 V DS(ON 1 -4.5 V. DS(ON) GS < 1.0V. GS(th) SOIC-16 SOT-223 P-Channel -25 -8 -0.46 -1.5 0.9 0.7 -55 to 150 6 140 60 FDC6321C.RevB Units °C kV °C/W °C/W ...

Page 2

... P-Ch -0.65 -0.86 -1.5 N-Ch 0.33 0.45 =125°C 0.51 0.72 0.44 0.6 P-Ch 0.87 1.1 =125°C 1.21 1.8 1.22 1.5 N-Ch 1 P-Ch -1 N-Ch 1.45 P-Ch 0.8 N-Ch 50 P-Ch 63 N-Ch 28 P-Ch 34 N-Ch 9 P-Ch 10 FDC6321C.RevB Units µA µ ...

Page 3

... Max N- P-Ch 55 110 N- P- N-Ch 1.64 2.3 P-Ch 1.1 1.5 N-Ch 0.38 P-Ch 0.32 N-Ch 0.45 P-Ch 0.25 N-Ch 0.3 P-Ch -0.5 N-Ch 0.83 1.2 =125°C 0.69 0.85 J P-Ch -0.89 -1.2 =125°C -0.75 -0. FDC6321C.RevB Units guaranteed ...

Page 4

... DRAIN CURRENT (A) D Drain Current and Gate Voltage. 125°C 25°C 1.5 2 2 GATE TO SOURCE VOLTAGE (V) GS Gate-To-Source Voltage 125° 25°C -55°C 0.2 0.4 0.6 0 BODY DIODE FORWARD VOLTAGE (V) SD Variation with Source Current and Temperature. FDC6321C.RevB 1.2 ID= 0.5A 4.5 5 1.2 ...

Page 5

... Figure 9. Maximum Safe Operating Area. (continued) 150 100 10V 15V 0.1 1.6 2 Figure 8. Capacitance Characteristics 0. Figure 10. Single Pulse Maximum Power C iss C oss MHz rss 0 DRAIN TO SOURCE VOLTAGE (V) DS SINGLE PULSE R =See note 25° SINGLE PULSE TIME (SEC) Dissipation. 25 100 300 FDC6321C.RevB ...

Page 6

... Drain Current and Gate Voltage. ID=-0.5A 25°C 125°C -1.5 -2 -2 GATE TO SOURCE VOLTAGE (V) GS Gate-To- Source Voltage 125°C J 25°C -55°C 0.2 0.4 0.6 0 BODY DIODE FORWARD VOLTAGE (V) SD Variation with Source Current and Temperature. FDC6321C.RevB -4.5 1 -4.5 -5 1.2 ...

Page 7

... Figure 20. Single Pulse Maximum Power 0.01 0 TIME (sec iss C oss C rss = 0 V 0.3 0 DRAIN TO SOURCE VOLTAGE (V) DS SINGLE PULSE R =See note 25° SINGLE PULSE TIME (SEC) Dissipation. R ( See Note 1b JA P(pk ( Duty Cycle 100 25 100 300 300 FDC6321C.RevB ...

Page 8

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ CoolFET™ CROSSVOLT™ CMOS FACT™ FACT Quiet Series™ ® FAST FASTr™ GTO™ ...

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