FDS9933BZ Fairchild Semiconductor, FDS9933BZ Datasheet - Page 2

• Manufacturer Part Number: FDS9933BZ
• Description: MOSFET P-CH DUAL 20V 4.9A 8-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDS9933BZ

• Fet Type: 2 P-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 46 mOhm @ 4.9A, 4.5V
• Drain To Source Voltage (vdss): 20V
• Current - Continuous Drain (id) @ 25° C: 4.9A
• Vgs(th) (max) @ Id: 1.5V @ 250µA
• Gate Charge (qg) @ Vgs: 15nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 985pF @ 10V
• Power - Max: 900mW
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Configuration: Dual Dual Drain
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 0.046 Ohm @ 4.5 V
• Drain-source Breakdown Voltage: 20 V
• Gate-source Breakdown Voltage: +/- 12 V
• Continuous Drain Current: 4.9 A
• Power Dissipation: 1600 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDS9933BZTR

©2008 Fairchild Semiconductor Corporation
FDS9933BZ Rev.C
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
NOTES:
1. R
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
BV
∆BV
I
I
V
r
g
C
C
C
t
t
t
t
Q
Q
Q
I
V
t
Q
∆V
DSS
GSS
d(on)
r
d(off)
f
S
rr
DS(on)
FS
GS(th)
SD
the user's board design.
∆T
∆T
iss
oss
rss
g
gs
gd
rr
Symbol
θJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Maximum continuous Drain-Sourse Diode Forward Current
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Parameter
2
T
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
= 25°C unless otherwise noted
a) 78°C/W when mounted on a 1 in
pad of 2 oz copper
V
V
V
V
V
f = 1MHz
I
I
V
V
V
I
V
V
V
V
V
I
D
D
D
F
DD
GS
DD
GS
DS
DS
GS
GS
GS
GS
GS
DD
GS
= -4.9A, di/dt = 100A/µs
= -250µA, V
= -250µA, referenced to 25°C
= -250µA, referenced to 25°C
= -4.5V
= -10V, V
= -10V, I
= -4.5V, R
= -10V, I
= -16V, V
= 0V, I
= ±12V, V
= V
= -4.5V, I
= -2.5V, I
= -4.5V, I
= -10V, I
2
DS
Test Conditions
, I
S
D
D
= -1.3A
D
D
GS
2
D
D
D
GS
GS
DS
= -4.9A,
GEN
= -4.9A
= -250µA
= -4.9A
= -4.9A, T
= -4.9A
= -4.0A
= 0V,
= 0V
= 0V
= 0V
= 6Ω
(Note 2)
J
= 125°C
θJC
is guaranteed by design while R
b) 135°C/W when mounted on a
minimun pad
-0.4
Min
-20
-0.8
740
160
145
6.7
9.3
1.4
3.7
59
47
46
23
11
-0.9
Typ
38
54
52
17
3
-9
-1.3
-1.2
985
215
220
-1.5
θCA
14
19
95
76
15
74
37
±10
46
69
67
Max
www.fairchildsemi.com
1
is determined by
mV/°C
mV/°C
mΩ
Units
pF
pF
pF
nC
µA
µA
nC
nC
nC
ns
ns
ns
ns
ns
V
S
V
A
V