FDC3601N Fairchild Semiconductor, FDC3601N Datasheet - Page 2

MOSFET N-CH DUAL 100V SSOT-6

FDC3601N

Manufacturer Part Number
FDC3601N
Description
MOSFET N-CH DUAL 100V SSOT-6
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet

Specifications of FDC3601N

Fet Type
2 N-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
500 mOhm @ 1A, 10V
Drain To Source Voltage (vdss)
100V
Current - Continuous Drain (id) @ 25° C
1A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
5nC @ 10V
Input Capacitance (ciss) @ Vds
153pF @ 50V
Power - Max
700W
Mounting Type
Surface Mount
Package / Case
6-SSOT, SuperSOT-6
Configuration
Dual
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.5 Ohm @ 10 V
Forward Transconductance Gfs (max / Min)
3.6 S
Drain-source Breakdown Voltage
100 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
1 A
Power Dissipation
960 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Module Configuration
Dual
Continuous Drain Current Id
1A
Drain Source Voltage Vds
100V
On Resistance Rds(on)
500mohm
Rds(on) Test Voltage Vgs
10V
Rohs Compliant
Yes
Threshold Voltage Vgs Typ
2.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Notes:
1. R
2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%
Electrical Characteristics
Symbol
Off Characteristics
BV
I
I
I
On Characteristics
V
R
I
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
the drain pins. R
f
DSS
GSSF
GSSR
D(on)
d(on)
r
d(off)
S
BV
V
FS
GS(th)
SD
DS(on)
iss
oss
rss
g
gs
gd
JA
GS(th)
DSS
T
T
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
DSS
J
J
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
JC
is guaranteed by design while R
a)
mounted on a 0.125
in
copper.
2
Parameter
130 C/W when
pad of 2 oz.
(Note 2)
(Note 2)
CA
is determined by the user's board design.
T
V
I
V
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
A
D
D
b)
= 25°C unless otherwise noted
GS
DS
GS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
= 250 A,Referenced to 25 C
= 250 A,Referenced to 25 C
mounted on a .004 in
pad of 2 oz copper
= 10 V, I
= 80 V,
= V
= 5V,
= 50 V,
= 50 V,
= 0 V,
= 20 V,
= –20 V,
= 10 V,
= 6 V,
= 10 V,
= 50 V,
= 10 V,
= 10 V
= 0 V,
140°C/W when
Test Conditions
GS
,
D
I
S
= 1.0 A, T
= 0.8 A
V
V
V
I
I
I
I
V
I
V
I
R
I
GS
DS
DS
D
D
D
D
D
D
D
DS
GEN
GS
= 250 A
= 250 A
= 1.0 A
= 0.9 A
= 1.0 A
= 1 A,
= 1.0 A,
2
= 0 V
= 0 V
= 0 V
= 10 V
= 0 V,
= 6
J
= 125 C
(Note 2)
Min
100
2
3
c)
minimum pad.
Typ Max Units
105
370
396
685
153
2.6
3.6
3.7
0.8
0.8
180°C/W when mounted on a
–5
11
5
1
8
4
6
1
–100
100
500
550
976
0.8
1.2
10
16
20
12
4
8
5
FDC3601N Rev C(W)
mV/ C
mV/ C
m
nC
nC
nC
nA
nA
pF
pF
pF
ns
ns
ns
ns
V
V
A
S
A
V
A

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