NTMD2C02R2SG ON Semiconductor, NTMD2C02R2SG Datasheet - Page 10

• Manufacturer Part Number: NTMD2C02R2SG
• Description: MOSFET N/P-CH COMPL 20V 8-SOIC
• Manufacturer: ON Semiconductor

Specifications of NTMD2C02R2SG

• Fet Type: N and P-Channel
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 43 mOhm @ 4A, 4.5V
• Drain To Source Voltage (vdss): 20V
• Current - Continuous Drain (id) @ 25° C: 5.2A, 3.4A
• Vgs(th) (max) @ Id: 1.2V @ 250µA
• Gate Charge (qg) @ Vgs: 20nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 1100pF @ 10V
• Power - Max: 2W
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

design. The footprint for the semiconductor packages must
be the correct size to ensure proper solder connection
input pad size. This can vary from the minimum pad size
for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by T
temperature of the die, R
the device junction to ambient; and the operating
temperature, T
sheet for the SOIC−8 package, P
follows:
ratings table on the data sheet. Substituting these values
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
• When preheating and soldering, the temperature of the
*Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
Surface mount board layout is a critical portion of the total
The power dissipation of the SOIC−8 is a function of the
The values for the equation are found in the maximum
The melting temperature of solder is higher than the rated
soldering should be 100°C or less.*
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
INFORMATION FOR USING THE SOIC−8 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
A
. Using the values provided on the data
P
D
J(max)
=
, the maximum rated junction
T
qJA
J(max)
, the thermal resistance from
R
qJA
− T
D
A
can be calculated as
0.024
0.6
0.275
7.0
SOIC−8 POWER DISSIPATION
SOLDERING PRECAUTIONS
http://onsemi.com
10
interface between the board and the package. With the
correct pad geometry, the packages will self−align when
subjected to a solder reflow process.
into the equation for an ambient temperature T
one can calculate the power dissipation of the device which
in this case is 2.0 Watts.
recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 2.0 Watts using the
footprint shown. Another alternative would be to use a
ceramic substrate or an aluminum core board such as
Thermal Cladt. Using board material such as Thermal
Cladt, the power dissipation can be doubled using the
same footprint.
• The soldering temperature and time shall not exceed
• When shifting from preheating to soldering, the
• After soldering has been completed, the device should
• Mechanical stress or shock should not be applied
The 62.5°C/W for the SOIC−8 package assumes the
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
260°C for more than 10 seconds.
maximum temperature gradient shall be 5°C or less.
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
during cooling.
0.060
0.155
1.52
4.0
0.050
1.270
inches
mm
P
D
=
150°C − 25°C
62.5°C/W
= 2.0 Watts
A
of 25°C,