FDY102PZ Fairchild Semiconductor, FDY102PZ Datasheet - Page 2
![MOSFET P-CH 20V 830MA SC89-3](/photos/5/45/54558/fdy102pz_sml.jpg)
FDY102PZ
Manufacturer Part Number
FDY102PZ
Description
MOSFET P-CH 20V 830MA SC89-3
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet
1.FDY102PZ.pdf
(7 pages)
Specifications of FDY102PZ
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
500 mOhm @ 830mA, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
830mA
Vgs(th) (max) @ Id
1V @ 250µA
Gate Charge (qg) @ Vgs
3.1nC @ 4.5V
Input Capacitance (ciss) @ Vds
135pF @ 10V
Power - Max
446mW
Mounting Type
Surface Mount
Package / Case
SC-89-3
Configuration
Single
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.5 Ohm @ 4.5 V
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 8 V
Continuous Drain Current
0.83 A
Power Dissipation
625 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDY102PZTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDY102PZ-NL
Manufacturer:
ON/安森美
Quantity:
20 000
©2010 Fairchild Semiconductor Corporation
FDY102PZ Rev.B2
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics and Maximum Rating
Notes:
1. R
2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0%
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
BV
'BV
I
I
V
r
g
C
C
C
t
t
t
t
Q
Q
Q
I
V
t
Q
DSS
GSS
'V
d(on)
r
d(off)
f
S
rr
DS(on)
FS
user's board design.
GS(th)
iss
oss
rss
SD
'T
'T
g
gs
gd
rr
Symbol
TJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1 in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On-Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Maximum Continuous Drain-Source Diode Forward Current
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
(Note 2)
Parameter
(Note 2)
a) 200
a 1 in
T
2
J
oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
o
C/W when mounted on
2
= 25 °C unless otherwise noted
pad of 2 oz copper.
I
I
V
V
V
I
V
V
V
V
V
T
V
V
V
V
V
V
I
V
f = 1 MHz
D
D
D
F
J
DS
GS
GS
GS
GS
GS
GS
GS
DD
DD
GS
DD
GS
GS
DS
= –0.83 A, dI
= –250 PA, V
= –250 PA, referenced to 25 °C
= –250 PA, referenced to 25 °C
=125 °C
= –16 V, V
= –4.5 V
= 0 V, I
= ±8 V, V
= V
= –4.5 V, I
= –2.5 V, I
= –1.8 V, I
= –1.5 V, I
= –4.5 V, I
= –5 V, I
= –10 V, V
= –10 V, I
= –4.5 V, R
= –10 V, I
2
DS
Test Conditions
, I
S
D
D
= –0.52 A
DS
D
D
= –250 PA
D
D
D
D
D
= –0.83 A
GS
F
GS
GS
GEN
= –0.83 A
= –0.83 A
/dt = 100 A/Ps
= –0.83 A
= –0.70 A
= –0.43 A
= –0.36 A
= –0.83 A,
= 0 V
= 0 V
= 0 V,
= 0 V
= 6 :
(Note 2)
TJC
is guaranteed by design while R
b) 280
minimum pad of 2 oz copper.
–0.4
Min
–20
o
C/W when mounted on a
–1.0
–0.7
0.28
0.36
0.47
0.62
0.39
100
3.8
Typ
3.5
2.9
2.2
0.3
0.6
23
18
18
23
13
-11
3
2
TJA
–0.52
–1.2
–1.0
0.85
135
Max
is determined by the
±10
0.5
0.7
1.2
1.8
3.1
35
30
31
10
www.fairchildsemi.com
10
10
37
23
–1
mV/°C
mV/°C
Units
nC
pF
pF
pF
nC
nC
nC
PA
PA
ns
ns
ns
ns
ns
:
A
V
V
S
V