CS495303-CVZR Cirrus Logic Inc, CS495303-CVZR Datasheet - Page 16
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CS495303-CVZR
Manufacturer Part Number
CS495303-CVZR
Description
Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
Manufacturer
Cirrus Logic Inc
Specifications of CS495303-CVZR
Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
5.12 Switching Characteristics — Serial Control Port - I
16
SCP_CLK frequency
SCP_CLK low time
SCP_CLK high time
SCP_SCK rising to SCP_SDA rising or falling for START or
STOP condition
START condition to SCP_CLK falling
SCP_CLK falling to STOP condition
Bus free time between STOP and START conditions
Setup time SCP_SDA input valid to SCP_CLK rising
Hold time SCP_SDA input after SCP_CLK falling
SCP_CLK low to SCP_SDA out valid
SCP_CLK falling to SCP_IRQ rising
NAK condition to SCP_IRQ low
SCP_CLK rising to SCB_BSY low
SCP_BSY
SCP_CLK
SCP_SDA
SCP_IRQ
1. The specification f
the actual maximum speed of the communication port may be limited by the firmware application. Flow control
using the SCP_BSY pin should be implemented to prevent overflow of the input data buffer.
t
iicstscl
t
iicckcmd
1
Parameter
iicck
t
iicsu
A6
indicates the maximum speed of the hardware. The system designer should be aware that
0
t
iich
Figure 5. Serial Control Port - I
1
t
iicckh
t
iicckl
A0
6
Copyright 2009 Cirrus Logic
t
iicr
R/W
7
t
iicdov
ACK
Symbol
t
8
iicckcmd
t
t
t
t
t
t
t
t
iicstscl
t
t
iicbsyl
f
iicdov
iicirqh
t
iicckh
iicstp
iicirql
iicckl
t
iicck
iicbft
iicsu
iicf
iich
2
MSB
C Slave Mode Timing
0
1.25
1.25
1.25
1.25
Min
100
2.5
20
3
-
-
-
-
1
f
2
iicck
C Slave Mode
3
3
t
*
*
iicirqh
DCLKP + 20
DCLKP + 20
Typical
6
LSB
7
t
3
iiccbsyl
*
ACK
DCLKP + 40
8
Max
400
18
t
t
iicirql
-
-
-
-
-
-
iicstp
t
iicckcmd
DS705PP6
Units
t
kHz
iicbft
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns