CS495303-CVZR Cirrus Logic Inc, CS495303-CVZR Datasheet - Page 5
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CS495303-CVZR
Manufacturer Part Number
CS495303-CVZR
Description
Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
Manufacturer
Cirrus Logic Inc
Specifications of CS495303-CVZR
Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.1 Migrating from CS4953x3 to CS4953x4
2.2 Licensing
3. Code Overlays
DS705PP6
application notes. Please contact your local Cirrus Sales representative for more information.
overlays. The overlays have been divided into three main groups called Decoders, Matrix-processors, and
Post-processors. All software components are defined below:
processing host messages, calling audio-processing subroutines, error concealment, etc.
the decoding/processing algorithms listed below require delivery of PCM or IEC61937-packed, compressed
data via I
processors. Generally speaking, these modules alter the number of valid channels in the audio I/O buffer
through processes like Virtualization (n 2 channels) or Matrix Decoding (2 n channels). Examples are Dolby
ProLogic IIx and DTS Neo:6.
Processors. Examples are Bass Management, Audio Manager, Tone Control, EQ, Delay, Customer-specific
Effects, Dolby Headphone/Virtual Speaker, etc.
requested. Each overlay can be reloaded independently without disturbing the other overlays. For example,
when a new decoder is selected, the OS, matrix-, and post-processors do not need to be reloaded — only the
new decoder (the same is true for the other overlays).
Firmware User’s Manual for the latest listing of application codes and Cirrus Framework
Licenses are required for all of the 3rd party audio decoding/processing algorithms listed below, including the
The suite of software available for the CS4953xx family consists of an operating system (OS) and a library of
1. OS/Kernel - Encompasses all non-audio processing tasks, including loading data from external memory,
2. Decoders - Any Module that initially writes data into the audio I/O buffers, e.g. AC-3
3. Matrix-processors - Any module that processes audio I/O buffer PCM data in-place before the Post-
4. Post-processors - Any module that processes audio I/O buffer PCM data in-place after the Matrix-
The overlay structure reduces the time required to reconfigure the DSP when a processing change is
Table 2
• The recommended way to boot the DSP for normal operation is “master boot”. Refer to Chapter 1 of the
• CS4953x4 DSPs are only available in 128 pin package.
• The serial flash chip select pin used is pin 14 (GPIO0) for Master Boot. Cirrus Logic recommends that at
• CS4953x4 DSP family supports DSP Condenser and DSP Manager API for run-time control/host
CS4953x4/CS4970x4 System Designer’s Guide. CS4953x4 will support slave boot mode as well (used
for programming the serial flash with the DSP code, through the SCP2 port).
least an 8-Mbit serial Flash device be used. Refer to CS4953x4/CS4970x4 System Designer’s Guide for a
list of Flash types that are currently supported
communication. Please refer to CS4953x4/CS4970x4 System Designer’s Guide for details.
below lists the firmware available based on device selection. Please refer AN288 CS4953xx/CS497xxx
2
S- or LJ-formatted digital audio to the CS4953xx.
Copyright 2009 Cirrus Logic
32-bit Audio Decoder DSP Family
™
™
, DTS, PCM, etc. All
CS4953xx Data Sheet
modules available.
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