CS495303-CVZR Cirrus Logic Inc, CS495303-CVZR Datasheet - Page 3
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CS495303-CVZR
Manufacturer Part Number
CS495303-CVZR
Description
Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
Manufacturer
Cirrus Logic Inc
Specifications of CS495303-CVZR
Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9. Package Mechanical Drawings ..............................................................................................33
10. Revision History ....................................................................................................................35
List of Figures
Figure 1. RESET Timing ........................................................................................................................................12
Figure 2. XTI Timing ..............................................................................................................................................12
Figure 3. Serial Control Port - SPI Slave Mode Timing ..........................................................................................14
Figure 4. Serial Control Port - SPI Master Mode Timing ........................................................................................15
Figure 5. Serial Control Port - I
Figure 6. Serial Control Port - I
Figure 7. Parallel Control Port - Intel
Figure 8. Parallel Control Port - Intel Slave Mode Write Cycle ..............................................................................19
Figure 9. Parallel Control Port - Motorola
Figure 10. Parallel Control Port - Motorola Slave Mode Write Cycle Timing .........................................................21
Figure 11. Digital Audio Input (DAI) Port Timing Diagram .....................................................................................22
Figure 12. DSD
Figure 13. Digital Audio Port Output Timing Master Mode .....................................................................................24
Figure 14. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK) ...........................................25
Figure 15. External Memory Interface - SDRAM Burst Read Cycle .......................................................................26
Figure 16. External Memory Interface - SDRAM Burst Write Cycle .......................................................................26
Figure 17. External Memory Interface - SDRAM Auto Refresh Cycle ....................................................................27
Figure 18. External Memory Interface - SDRAM Load Mode Register Cycle ........................................................27
Figure 19. 128-pin LQFP Pin-Out Drawing (CS495303/CS495313) ......................................................................30
Figure 20. 128-pin LQFP Pin-Out Drawing (CS495304/CS495314) ......................................................................31
Figure 21. 144-pin LQFP Pin-Out Drawing (CS495313) ........................................................................................32
Figure 22. 128-pin LQFP Package Drawing .........................................................................................................33
Figure 23. 144-pin LQFP Package Drawing .........................................................................................................34
List of Tables
Table 1. CS4953xx Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2. Device and Firmware Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. CS49530x DSP Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. CS49531x DSP Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 6. Environmental, Manufacturing, and Handling Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 7. 128-pin LQFP Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 8. 144-pin LQFP Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DS705PP6
9.1 128-pin LQFP Package Drawing ............................................................................................................ 33
9.2 144-pin LQFP Package Drawing ............................................................................................................ 34
®
Serial Audio Input Timing ...........................................................................................................23
2
2
C Slave Mode Timing ..........................................................................................16
C Master Mode Timing ........................................................................................17
®
Slave Mode Read Cycle ............................................................................19
®
Slave Mode Read Cycle Timing .........................................................21
Copyright 2009 Cirrus Logic
32-bit Audio Decoder DSP Family
CS4953xx Data Sheet
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