WM8350GEB/V Wolfson Microelectronics, WM8350GEB/V Datasheet - Page 113

• Manufacturer Part Number: WM8350GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8350GEB/V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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The WM8350 can be commanded to assert the /RST and /MEMRST signals by writing a logic ‘1’ to
the SYS_RST register bit. In this case, the /RST and /MEMRST outputs are asserted low for the
duration specified by RSTB_TO.
Care must be taken if writing to this bit in 2-wire (I2C) Control Interface mode. The WM8350 will act
upon the register write operation as soon as it has received the address and data fields; this may
happen before the I2C Acknowledge has been clocked by the host processor. If the /RST signal
causes the processor to reset before it has clocked the I2C Acknowledge, then the WM8350 will
continue to assert the Acknowledge signal (ie. pull the SDA pin low) after the processor has
completed its reset. On some processors, it may be necessary to toggle the SCLK pin in order to
clear the Acknowledge signal and resume I2C communications.
Table 60 Software Reset Command
R3 (03h)
System
Control 1
ADDRESS
BIT
14
SYS_RST
LABEL
DEFAULT
0
Allows the processors to reboot itself
0 = Do nothing
1 = Perform a processor reset by asserting
the /RST and /MEMRST (GPIO) pins for the
programmed duration
Protected by security key.
DESCRIPTION
PD, March 2010, Rev 4.2
WM8350
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