WM8350GEB/V Wolfson Microelectronics, WM8350GEB/V Datasheet - Page 272
WM8350GEB/V
Manufacturer Part Number
WM8350GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8350GEBV.pdf
(339 pages)
Specifications of WM8350GEB/V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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WM8350
w
REGISTER
ADDRESS
BIT
9
8
7
6
5
4
3
2
1
GP9_INTMODE
GP8_INTMODE
GP7_INTMODE
GP6_INTMODE
GP5_INTMODE
GP4_INTMODE
GP3_INTMODE
GP2_INTMODE
GP1_INTMODE
LABEL
DEFAULT
0
0
0
0
0
0
0
0
0
GPIO9 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP9_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO8 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP8_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO7 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP7_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO6 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP6_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO5 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP5_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO4 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP4_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO3 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP3_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO2 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP2_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO1 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP1_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
DESCRIPTION
PD, March 2010, Rev 4.2
REFER TO
Production Data
272
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