CS8420-CSR Cirrus Logic Inc, CS8420-CSR Datasheet - Page 43
CS8420-CSR
Manufacturer Part Number
CS8420-CSR
Description
Audio DSPs IC Digital Audio Sample Rate Convertr
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS8420-CSZ.pdf
(94 pages)
Specifications of CS8420-CSR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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DS245F4
10.14 Receiver Channel Status (0Fh) (Read Only)
AUX[3:0]
PRO
AUDIO
COPY
ORIG
Note:
AUX3
7
COPY and ORIG will both be set to 1 if the incoming data is flagged as professional or if the receiver is not
in use.
AUX2
The bits in this register can be associated with either channel A or B of the received data. The
desired channel is selected with the CHS bit of the Channel Status Data Buffer Control Regis-
ter.
coming channel status bits, decoded according to IEC60958 and AES3.
0000 - Auxiliary data is not present
0001 - Auxiliary data is 1 bit long
0010 - Auxiliary data is 2 bits long
0011 - Auxiliary data is 3 bits long
0100 - Auxiliary data is 4 bits long
0101 - Auxiliary data is 5 bits long
0110 - Auxiliary data is 6 bits long
0111 - Auxiliary data is 7 bits long
1000 - Auxiliary data is 8 bits long
1001 - 1111 Reserved
0 - Received channel status block is in consumer format
1 - Received channel status block is in professional format
Audio indicator
0 - Received data is linearly coded PCM audio
1 - Received data is not linearly coded PCM audio
SCMS copyright indicator
0 - Copyright asserted
1 - Copyright not asserted
0 - Received data is 1st generation or higher
1 - Received data is original
The AUX3-0 bits indicate the width of the incoming auxiliary data field, as indicated by the in-
Channel status block format indicator
SCMS generation indicator. This is decoded from the category code and the L bit.
6
AUX1
5
AUX0
4
PRO
3
AUDIO
2
COPY
1
CS8420
ORIG
0
43
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