UDA1344TSDB NXP Semiconductors, UDA1344TSDB Datasheet - Page 13

Audio CODECs AUDIO CODEC W/DSP

UDA1344TSDB

Manufacturer Part Number
UDA1344TSDB
Description
Audio CODECs AUDIO CODEC W/DSP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1344TSDB

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
55 KSPs
Interface Type
Serial (I2S), L3
Resolution
20 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Minimum Operating Temperature
- 40 C
Number Of Channels
2 ADC, 2 DAC
Snr
100 dB
Supply Current
9 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
UDA1344TS/N2,512
NXP Semiconductors
L3 interface registers
When the data transfer of type ‘status’ is selected, the features system clock frequency, data input format and DC filter
can be controlled.
Table 14 Data transfer of type ‘status’
When the data transfer of type ‘data’ is selected, the features volume, bass boost, treble, de-emphasis, mute, mode and
power control can be controlled.
Table 15 Data transfer of type ‘data’
2001 Jun 29
handbook, full pagewidth
BIT 7
BIT 7
Low-voltage low-power stereo audio
CODEC with DSP features
0
0
0
1
1
BIT 6
BIT 6
0
0
1
0
1
L3CLOCK
L3MODE
BIT 5
BIT 5
L3DATA
SC1
VC5
BB3
0
0
BIT 4
BIT 4
SC0
VC4
DE1
BB2
0
BIT 3
BIT 3
VC3
BB1
DE0
IF2
0
address
BIT 2
BIT 2
VC2
BB0
IF1
MT
Fig.6 Multibyte data transfer.
0
data byte #1
BIT 1
BIT 1
VC1
PC1
TR1
IF0
M1
13
BIT 0
BIT 0
VC0
PC0
TR0
DC
M0
t stp(L3)
data byte #2
SC = system clock frequency (2 bits); see Table 16
IF = data input format (3 bits); see Table 17
DC = DC filter (1 bit); see Table 18
VC = volume control (6 bits); see Table 19
TR = treble (2 bits); see Table 21
DE = de-emphasis (2 bits); see Table 22
MT = mute (1 bit); see Table 23
M = filter mode (2 bits); see Table 24
PC = power control (2 bits); see Table 25
BB = bass boost (4 bits); see Table 20
REGISTER SELECTED
REGISTER SELECTED
address
MGL725
UDA1344TS
Product specification

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