LAN89218AQ SMSC, LAN89218AQ Datasheet - Page 54

Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl

LAN89218AQ

Manufacturer Part Number
LAN89218AQ
Description
Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
Manufacturer
SMSC
Datasheet

Specifications of LAN89218AQ

Ethernet Connection Type
10BASE-T, 100BASE-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE802.3, IEEE802.3u
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Revision 1.3 (02-23-10)
3.11.4
3.11.4.1
3.11.4.2
3.12
PHY Reset Timing
The following sections specify the operation and time required for the internal PHY to become
operational after various resets or when returning from the reduced power state.
PHY Soft Reset via PMT_CTRL bit 10 (PHY_RST)
The PHY soft reset is initiated by writing a ‘1’ to bit 10 of the PMT_CTRL register (PHY_RST). This
self-clearing bit will return to ‘0’ after approximately 100 μs, at which time the PHY reset is complete.
PHY Soft Reset via PHY Basic Control Register (PHY Reg. 0.15)
The PHY Reg. 0.15 Soft Reset is initiated by writing a ‘1’ to bit 15 of the PHY’s Basic Control Register.
This self-clearing bit will return to ‘0’ at which time the PHY reset is complete.
Data is queued for transmission by writing it into the TX data FIFO. Each packet to be transmitted may
be divided among multiple buffers. Each buffer starts with a two DWORD TX command (TX command
‘A’ and TX command ‘B’). The TX command instructs the LAN89218 on the handling of the associated
buffer. Packet boundaries are delineated using control bits within the TX command.
The host provides a 16-bit Packet Tag field in the TX command. The Packet Tag value is appended
to the corresponding TX status DWORD. All Packet Tag fields must have the same value for all buffers
in a given packet. If tags differ between buffers in the same packet the TXE error will be asserted. Any
value may be chosen for a Packet Tag as long as all tags in the same Packet are identical. Packet
Tags also provide a method of synchronization between transmitted packets and their associated
status. Software can use unique Packet Tags to assist with validating matching status completions.
Note 3.14 The use of packet tags is not required by the hardware. This is a software LAN driver only
A Packet Length field in the TX command specifies the number of bytes in the associated packet. All
Packet Length fields must have the same value for all buffers in a given packet. Hardware compares
the Packet Length field and the actual amount of data received by the Ethernet controller. If the actual
packet length count does not match the Packet Length field as defined in the TX command, the
Transmitter Error (TXE) flag is asserted.
The LAN89218 can be programmed to start payload transmission of a buffer on a byte boundary by
setting the “Data Start Offset” field in the TX command. The “Data Start Offset” field points to the actual
start of the payload data within the first 8 DWORDs of the buffer. Data before the “Data Start Offset”
pointer will be ignored. When a packet is split into multiple buffers, each successive buffer may begin
on any arbitrary byte.
The LAN89218 can be programmed to strip padding from the end of a transmit packet in the event
that the end of the packet does not align with the host burst boundary. This feature is necessary when
the LAN89218 is operating in a system that always performs multi-word bursts. In such cases the
LAN89218 must guarantee that it can accept data in multiples of the Burst length regardless of the
actual packet length. When configured to do so, the LAN89218 will accept extra data at the end of the
packet and will remove the extra padding before transmitting the packet. The LAN89218 automatically
removes data up to the boundary specified in the Buffer End Alignment field specified in each TX
command.
The host can instruct the LAN89218 to issue an interrupt when the buffer has been fully loaded into
the TX FIFO contained in the LAN89218 and transmitted. This feature is enabled through the TX
command ‘Interrupt on Completion’ field.
TX Data Path Operation
application example for use of this field.
High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
DATASHEET
54
SMSC LAN89218
Datasheet

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