LAN8720AI-CP-TR SMSC, LAN8720AI-CP-TR Datasheet - Page 33

• Manufacturer Part Number: LAN8720AI-CP-TR
• Description: Ethernet ICs 10/100 Ethernet XCVR w/HP AutoMDIXSupport
• Manufacturer: SMSC

Specifications of LAN8720AI-CP-TR

• Product: Ethernet Transceivers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
SMSC LAN8720A/LAN8720Ai
3.7.3.1
3.7.3.2
3.7.4
STRAP VALUE
nINTSEL = 0
nINTSEL = 1
Disabling the Internal +1.2V Regulator
To disable the +1.2V internal regulator, a pull-up strapping resistor should be connected from the
REGOFF configuration strap to VDD2A. At power-on, after both VDDIO and VDD2A are within
specification, the transceiver will sample REGOFF to determine whether the internal regulator should
turn on. If the pin is sampled at a voltage greater than V
the system must supply +1.2V to the VDDCR pin. The VDDIO voltage must be at least 80% of the
operating voltage level (1.44V when operating at 1.8V, 2.0V when operating at 2.5V, 2.64V when
operating at 3.3V) before voltage is applied to VDDCR. As described in
REGOFF is left floating or connected to VSS, the internal regulator is enabled and the system is not
required to supply +1.2V to the VDDCR pin.
Enabling the Internal +1.2V Regulator
The +1.2V for VDDCR is supplied by the on-chip regulator unless the transceiver is configured for the
regulator off mode using the REGOFF configuration strap as described in
the internal +1.2V regulator is enabled when REGOFF is floating (due to the internal pull-down
resistor). During power-on, if REGOFF is sampled below V
on and operate with power from the VDD2A pin.
nINTSEL: nINT/REFCLKO Configuration
The nINTSEL configuration strap is used to select between one of two available modes: REF_CLK In
Mode (nINT) and REF_CLK Out Mode. The configured mode determines the function of the
nINT/REFCLKO pin. The nINTSEL configuration strap is latched at POR and on the rising edge of the
nRST. By default, nINTSEL is configured for nINT mode via the internal pull-up resistor.
The RMII REF_CLK is a continuous clock that provides the timing reference for CRS_DV, RXD[1:0],
TXEN, TXD[1:0] and RXER. The device uses REF_CLK as the network clock such that no buffering
is required on the transmit data path. However, on the receive data path, the receiver recovers the
clock from the incoming data stream. The device uses elasticity buffering to accommodate for
differences between the recovered clock and the local REF_CLK.
In REF_CLK In Mode, the 50MHz REF_CLK is driven on the XTAL1/CLKIN pin. This is the traditional
system configuration when using RMII, and is described in
REF_CLK Out Mode, the device generates the 50MHz RMII REF_CLK and the nINT interrupt is not
available. REF_CLK Out Mode allows a low-cost 25MHz crystal to be used as the reference for
REF_CLK. This configuration may result in reduced system cost and is described in
Note: Because the nINTSEL configuration strap shares functionality with the LED2 pin, proper
consideration must also be given to the LED polarity. Refer to
LED2 Polarity Selection," on page 37
nINTSEL and the LED2 polarity.
REF_CLK Out Mode
REF_CLK In Mode
MODE
Table 3.6 nINTSEL Configuration
DATASHEET
nINT/REFCLKO is the source of REF_CLK.
nINT/REFCLKO is an active low interrupt output.
The REF_CLK is sourced externally and must be driven
on the XTAL1/CLKIN pin.
33
for additional information on the relation between
IH
REF_CLK DESCRIPTION
, then the internal regulator is disabled and
IL
, then the internal +1.2V regulator will turn
Section
Section 3.8.1.2, "nINTSEL and
3.7.4.1. When configured for
Section
Section
Revision 1.2 (11-10-10)
3.7.3.1. By default,
Section
3.7.3.2, when
3.7.4.2.