LAN8720AI-CP-TR SMSC, LAN8720AI-CP-TR Datasheet - Page 69

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LAN8720AI-CP-TR

Manufacturer Part Number
LAN8720AI-CP-TR
Description
Ethernet ICs 10/100 Ethernet XCVR w/HP AutoMDIXSupport
Manufacturer
SMSC
Datasheet

Specifications of LAN8720AI-CP-TR

Product
Ethernet Transceivers
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
SMSC LAN8720A/LAN8720Ai
5.5.2
SYMBOL
t
t
pon
poff
Magnetics
VDD1A,
Power Sequence Timing
This diagram illustrates the device power sequencing requirements. The VDDIO, VDD1A, VDD2A and
magnetics power supplies can turn on in any order provided they all reach operational levels within
the specified time period t
0 volts within the specified time period p
Note: When the internal regulator is disabled, a power-up sequencing relationship exists between
VDD2A
VDDIO
Power supply turn on time
Power supply turn off time
Power
VDDCR and the 3.3V power supply. For additional information refer to
"REGOFF: Internal +1.2V Regulator Configuration," on page
Table 5.7 Power Sequence Timing Values
DESCRIPTION
Figure 5.2 Power Sequence Timing
pon
t
pon
. Device power supplies can turn off in any order provided they all reach
DATASHEET
off
.
69
MIN
32.
t
poff
TYP
Revision 1.2 (11-10-10)
MAX
500
50
Section 3.7.3,
UNITS
mS
mS

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