LX128C-32FN208C Lattice, LX128C-32FN208C Datasheet - Page 19
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LX128C-32FN208C
Manufacturer Part Number
LX128C-32FN208C
Description
Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 1.8V, SERDES, 3.2ns, Pb-Free
Manufacturer
Lattice
Datasheet
1.LX256EV-5FN484C.pdf
(75 pages)
Specifications of LX128C-32FN208C
Maximum Dual Supply Voltage
1.95 V
Minimum Dual Supply Voltage
1.65 V
Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
1.8 V
Supply Type
Triple
Configuration
128 x 128
Package / Case
FPBGA-208
Data Rate
21 Gbps
Input Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Output Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 13. Operation in FIFO Mode
Notes:
1. For clarity, only a portion of the GDX Block is shown.
2. Some signals share pins. See Logic Signal Connections tables for details.
GRP
Output
Output
Output
Latch
Latch
Latch
Latch
Latch
Latch
Input
Reg/
Reg/
Input
Reg/
Input
Reg/
Reg/
Reg/
GDX Block
1
Delay
2
10
RCLK
EMPTY
DOUT
RE
FULL
FIFORSTb
FIFO
WCLK
16
WE
DIN
PT-CLK/CE(0:3)
GCLK/CE(0:3)
10
10
SYDT
Parallel
Parallel
RECCLK
RXD
Data
Data
TXD
POR
RESETb
SERDES
ispGDX2 Family Data Sheet
CDRRSTb
Serial
Data Out
(SOUT)
Serial
Data In
(SIN)
Pre-Assigned Pins
CAL
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