LX128C-32FN208C Lattice, LX128C-32FN208C Datasheet - Page 59
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LX128C-32FN208C
Manufacturer Part Number
LX128C-32FN208C
Description
Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 1.8V, SERDES, 3.2ns, Pb-Free
Manufacturer
Lattice
Datasheet
1.LX256EV-5FN484C.pdf
(75 pages)
Specifications of LX128C-32FN208C
Maximum Dual Supply Voltage
1.95 V
Minimum Dual Supply Voltage
1.65 V
Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
1.8 V
Supply Type
Triple
Configuration
128 x 128
Package / Case
FPBGA-208
Data Rate
21 Gbps
Input Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Output Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
ispGDX2-128 Logic Signal Connections
TOE
BK0_IO0
BK0_IO1
BK0_IO2 / PLL_LOCK2 /
PLL_RST2
BK0_IO3
GND
BK0_IO4
BK0_IO5
BK0_IO6
BK0_IO7
BK0_IO8
BK0_IO9 / PLL_FB2
BK0_IO10
BK0_IO11
GND
BK0_IO12
BK0_IO13
BK0_IO14
BK0_IO15 / VREF0
GOE3
TDO
GND
BK1_IO0 / VREF1
BK1_IO1
BK1_IO2
BK1_IO3
BK1_IO4
BK1_IO5
BK1_IO6
BK1_IO7
BK1_IO8
BK1_IO9
BK1_IO10
BK1_IO11
GND
BK1_IO12
BK1_IO13
BK1_IO14
BK1_IO15 / CLK_OUT2
GCLK/CE2
SEL2
SEL3
GCLK/CE3
BK2_IO0
BK2_IO1
BK2_IO2
Signal Name
sysIO
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
-
-
-
-
-
-
-
Pair/Polarity
LVDS
10N
11N
12N
13N
14N
15N
16N
17N
10P
11P
12P
13P
14P
15P
16P
0N
0P
1N
1P
2N
2P
3N
3P
4N
4P
5N
5P
6N
6P
7N
7P
8P
8N
9P
9N
Block MRB
GDX
1A
1A
1A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
-
-
-
-
-
-
-
-
-
-
-
7
7
7
10
11
12
13
14
15
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
-
-
-
-
-
-
-
-
-
-
-
HSI0A_CDRRSTb
HSI0B_CDRRSTb
FIFO0A_STRDb
FIFO0B_STRDb
SS_CLKOUT1N
SS_CLKOUT1P
SERDES Mode
HSI0A_SOUTN
HSI0A_SOUTP
HSI0B_SOUTP
HSI0B_SOUTN
HSI0_CSLOCK
HSI0A_SYDT
HSI0B_SYDT
SS_CLKIN1N
SS_CLKIN1P
HSI0A_SINN
HSI0A_SINP
HSI0B_SINP
HSI0B_SINN
56
I/O Pin
Note 4
Note 4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
5
5
6
6
HSI0A_RXD0/TXD0
HSI0A_RXD1/TXD1
HSI0A_RXD2/TXD2
HSI0A_RXD3/TXD3
HSI0A_RXD4/TXD4
HSI0A_RXD5/TXD5
HSI0A_RXD6/TXD6
HSI0A_RXD7/TXD7
HSI0A_RXD8/TXD8
HSI0A_RXD9/TXD9
HSI0B_RXD0/TXD0
HSI0B_RXD1/TXD1
HSI0B_RXD2/TXD2
HSI0B_RXD3/TXD3
HSI0B_RXD4/TXD4
HSI0B_RXD5/TXD5
HSI0B_RXD6/TXD6
HSI0B_RXD7/TXD7
HSI0B_RXD8/TXD8
HSI0B_RXD9/TXD9
HSI0A_RECCLK
HSI0B_RECCLK
SERDES Mode
HSI0A_SYDT
HSI0B_SYDT
HSI1A_SYDT
I/O Cell
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ispGDX2 Family Data Sheet
2
5
5
5
FIFO0A_DIN0/DOUT0
FIFO0A_DIN1/DOUT1
FIFO0A_DIN2/DOUT2
FIFO0A_DIN3/DOUT3
FIFO0A_DIN4/DOUT4
FIFO0A_DIN5/DOUT5
FIFO0A_DIN6/DOUT6
FIFO0A_DIN7/DOUT7
FIFO0A_DIN8/DOUT8
FIFO0A_DIN9/DOUT9
FIFO0B_DIN0/DOUT0
FIFO0B_DIN1/DOUT1
FIFO0B_DIN2/DOUT2
FIFO0B_DIN3/DOUT3
FIFO0B_DIN4/DOUT4
FIFO0B_DIN5/DOUT5
FIFO0B_DIN6/DOUT6
FIFO0B_DIN7/DOUT7
FIFO0B_DIN8/DOUT8
FIFO0B_DIN9/DOUT9
FIFO0A_FIFORSTb
FIFO0B_FIFORSTb
FIFO0A_ EMPTY
FIFO0B_ EMPTY
FIFO Mode I/O
FIFO0A_FULL
FIFO0B_FULL
FIFO1A_FULL
Cell/Pin
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
fpBGA
GND
GND
GND
GND
M14
M13
M15
N10
R11
R12
N12
R13
N14
N15
N16
G16
H13
H14
G15
T10
R10
T11
P10
T13
P11
P12
T14
T15
P13
R16
P15
L14
L15
P16
K14
K13
K15
L16
K16
208
J14
J13
N8
N9
P8
P9
T9