FDB20AN06A0 Fairchild Semiconductor, FDB20AN06A0 Datasheet - Page 8

• Manufacturer Part Number: FDB20AN06A0
• Description: MOSFET N-CH 60V 45A TO-263AB
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDB20AN06A0

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 20 mOhm @ 45A, 10V
• Drain To Source Voltage (vdss): 60V
• Current - Continuous Drain (id) @ 25° C: 45A
• Vgs(th) (max) @ Id: 4V @ 250µA
• Gate Charge (qg) @ Vgs: 19nC @ 10V
• Input Capacitance (ciss) @ Vds: 950pF @ 25V
• Power - Max: 90W
• Mounting Type: Surface Mount
• Package / Case: D²Pak, TO-263 (2 leads + tab)
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.017 Ohms @ 10 V
• Drain-source Breakdown Voltage: 60 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 45 A
• Power Dissipation: 90 W
• Maximum Operating Temperature: + 175 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©2003 Fairchild Semiconductor Corporation
PSPICE Electrical Model
.SUBCKT FDP20AN06A0 2 1 3 ; rev April 2003
Ca 12 8 4.4e-10
Cb 15 14 4.4e-10
Cin 6 8 9.2e-10
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
Ebreak 11 7 17 18 67.2
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
Evtemp 20 6 18 22 1
It 8 17 1
Lgate 1 9 6.3e-9
Ldrain 2 5 1.0e-9
Lsource 3 7 2.5e-9
RLgate 1 9 63
RLdrain 2 5 10
RLsource 3 7 25
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 1e-3
Rgate 9 20 4.7
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
Rsource 8 7 RsourceMOD 10e-3
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*150),2.7))}
.MODEL DbodyMOD D (IS=3.8E-12 N=1.06 RS=4e-3 TRS1=2.4e-3 TRS2=1.1e-6
+ CJO=6.8e-10 M=0.53 TT=2.3e-8 XTI=3.9)
.MODEL DbreakMOD D (RS=1.8 TRS1=1e-3 TRS2=-8.9e-6)
.MODEL DplcapMOD D (CJO=2.7e-10 IS=1e-30 N=10 M=0.44)
.MODEL MmedMOD NMOS (VTO=3.8 KP=2 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=4.7 T_ABS=25)
.MODEL MstroMOD NMOS (VTO=4.34 KP=35 IS=1e-30 N=10 TOX=1 L=1u W=1u T_ABS=25)
.MODEL MweakMOD NMOS (VTO=3.27 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=47 RS=0.1 T_ABS=25)
.MODEL RbreakMOD RES (TC1=9e-4 TC2=1e-7)
.MODEL RdrainMOD RES (TC1=6e-3 TC2=8e-5)
.MODEL RSLCMOD RES (TC1=1e-3 TC2=3.5e-5)
.MODEL RsourceMOD RES (TC1=9e-3 TC2=1e-6)
.MODEL RvthresMOD RES (TC1=-5.1e-3 TC2=-1.3e-5)
.MODEL RvtempMOD RES (TC1=-3e-3 TC2=1e-7)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-8 VOFF=-5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-5 VOFF=-8)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2 VOFF=-1.5)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.5 VOFF=-2)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
GATE
1
RLGATE
LGATE
9
RGATE
CA
12
20
EVTEMP
+
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
8
6
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
+
-
MSTRO
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
MWEAK
17
RVTHRES
RBREAK
11
+
-
17
18
FDB20AN06A0 / FDP20AN06A0 Rev. B
7
+
18
-
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
SOURCE
DRAIN
2
3