HUF75344G3 Fairchild Semiconductor, HUF75344G3 Datasheet - Page 7

• Manufacturer Part Number: HUF75344G3
• Description: MOSFET N-CH 55V 75A TO-247
• Manufacturer: Fairchild Semiconductor
• Series: UltraFET™r

Specifications of HUF75344G3

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 8 mOhm @ 75A, 10V
• Drain To Source Voltage (vdss): 55V
• Current - Continuous Drain (id) @ 25° C: 75A
• Vgs(th) (max) @ Id: 4V @ 250µA
• Gate Charge (qg) @ Vgs: 210nC @ 20V
• Input Capacitance (ciss) @ Vds: 3200pF @ 25V
• Power - Max: 285W
• Mounting Type: Through Hole
• Package / Case: TO-247-3
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.008 Ohm @ 10 V
• Drain-source Breakdown Voltage: 55 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 75 A
• Power Dissipation: 285000 mW
• Maximum Operating Temperature: + 175 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PSPICE Electrical Model
.SUBCKT HUF75337 2 1 3 ;
CA 12 8 4.9e-9
CB 15 14 4.75e-9
CIN 6 8 2.85e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 59.7
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 2.6e-9
LSOURCE 3 7 1.1e-9
KGATE LSOURCE LGATE 0.0085
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 1.94e-3
RGATE 9 20 0.36
RLDRAIN 2 5 10
RLGATE 1 9 26
RLSOURCE 3 7 11
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 3.5e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*400),3))}
.MODEL DBODYMOD D (IS = 2.95e-12 RS = 2.6e-3 TRS1 = 1.05e-3 TRS2 = 5.0e-7 CJO = 5.19e-9 TT = 5.9e-8 M = 0.55)
.MODEL DBREAKMOD D (RS = 1.65e-1 IKF = 30 TRS1 = 1.15e-4 TRS2 = 2.27e-6)
.MODEL DPLCAPMOD D (CJO = 5.40e-9 IS = 1e-30 N=1 M = 0.88 )
.MODEL MMEDMOD NMOS (VTO = 3.29 KP = 5.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.36)
.MODEL MSTROMOD NMOS (VTO = 3.83 KP = 123 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.90 KP =0.04 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6)
.MODEL RBREAKMOD RES (TC1 = 1.15e-3 TC2 = 2.0e-7)
.MODEL RDRAINMOD RES (TC1 = 1.37e-2 TC2 = 3.85e-5)
.MODEL RSLCMOD RES (TC1 = 1.45e-4 TC2 = 2.11e-6)
.MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -3.7e-3 TC2 = -1.6e-5)
.MODEL RVTEMPMOD RES (TC1 = -2.4e-3 TC2 = 7e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.9 VOFF= -3.9)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.9 VOFF= -6.9)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.99 VOFF= 2.39)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.39 VOFF= -2.99)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2004 Fairchild Semiconductor Corporation
GATE
rev 3 Feb 1999
1
RLGATE
LGATE
9
RGATE
CA
12
20
+
EVTEMP
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
6
8
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
+
-
MSTRO
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
HUF75344G3, HUF75344P3, HUF75344S3S Rev. B2
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
7
+
18
-
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
SOURCE
DRAIN
2
3