BUK7880-55,135 NXP Semiconductors, BUK7880-55,135 Datasheet

MOSFET N-CH 55V 7.5A SOT223

BUK7880-55,135

Manufacturer Part Number
BUK7880-55,135
Description
MOSFET N-CH 55V 7.5A SOT223
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheets
1.BUK7880-55135.pdf (9 pages)
2.BUK7880-55135.pdf (13 pages)

Specifications of BUK7880-55,135

Package / Case
SOT-223 (3 leads + Tab), SC-73, TO-261
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
80 mOhm @ 5A, 10V
Drain To Source Voltage (vdss)
55V
Current - Continuous Drain (id) @ 25° C
7.5A
Vgs(th) (max) @ Id
4V @ 1mA
Input Capacitance (ciss) @ Vds
500pF @ 25V
Power - Max
1.8W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single Dual Drain
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.08 Ohm @ 10 V
Drain-source Breakdown Voltage
55 V
Gate-source Breakdown Voltage
16 V
Continuous Drain Current
3.5 A
Power Dissipation
1800 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gate Charge (qg) @ Vgs
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
934050520135
BUK7880-55 /T3
BUK7880-55 /T3
Philips Semiconductors
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope suitable for surface
mounting. Using ’trench’ technolgy
the device features very low on-state
resistance and has integral zener
diodes giving ESD protection. It is
intended for use in automotive and
general
applications.
PINNING - SOT223
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
ESD LIMITING VALUE
April 1998
TrenchMOS
Standard level FET
SYMBOL
V
V
I
I
I
I
P
P
T
SYMBOL
V
D
D
D
DM
PIN
V
stg
DS
DGR
tot
tot
C
1
2
3
4
GS
, T
j
gate
drain
source
drain (tab)
purpose
DESCRIPTION
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Total power dissipation
Storage & operating temperature
PARAMETER
Electrostatic discharge capacitor
voltage
transistor
switching
QUICK REFERENCE DATA
PIN CONFIGURATION
SYMBOL
V
I
P
T
R
D
j
DS
tot
DS(ON)
CONDITIONS
-
R
-
T
On PCB in Fig.2
T
On PCB in Fig.2
T
T
T
On PCB in Fig.2
T
-
CONDITIONS
Human body model
(100 pF, 1.5 k )
1
sp
amb
amb
sp
sp
amb
GS
PARAMETER
Drain-source voltage
Drain current
Total power dissipation
Junction temperature
Drain-source on-state
resistance
= 25 ˚C
= 25 ˚C
= 25 ˚C
= 20 k
= 25 ˚C
= 100 ˚C
= 25 ˚C
1
2
4
3
V
GS
= 10 V
SYMBOL
MIN.
MIN.
- 55
-
-
-
-
-
-
-
-
-
-
g
MAX.
Product specification
150
7.5
1.8
55
80
MAX.
MAX.
150
7.5
3.5
2.2
8.3
1.8
55
55
16
40
2
BUK7880-55
d
s
Rev 1.100
UNIT
UNIT
UNIT
kV
W
W
˚C
m
V
V
V
A
A
A
A
W
˚C
V
A

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BUK7880-55,135 Summary of contents

Page 1

... PIN CONFIGURATION CONDITIONS - ˚ PCB in Fig ˚C amb On PCB in Fig 100 ˚C amb ˚ ˚ PCB in Fig ˚C amb - CONDITIONS Human body model (100 pF, 1 Product specification BUK7880-55 MAX. UNIT 55 7.5 1.8 150 SYMBOL MIN. MAX. UNIT - 7.5 - 3 150 ˚ ...

Page 2

... 150˚ 150˚ mA 150˚C j CONDITIONS 25˚ MHz 25˚C j CONDITIONS T = 25˚ 25˚ -dI /dt = 100 - Product specification BUK7880-55 TYP. MAX. UNIT K/W MIN. TYP. MAX. UNIT 1 4 100 148 m MIN. TYP. MAX. UNIT 365 500 pF - 110 135 pF ...

Page 3

... 100 ID/A RDS(ON) = VDS/ 100 120 140 0.1 1 Fig.3. Safe operating area f & 100 10 1 0.1 100 120 140 0. Product specification BUK7880-55 MIN. TYP. MAX ˚ VDS ˚ f single pulse; parameter Zth/ (K/W) 0.5 0.2 0.1 0.05 0. 1.0E-06 0.0001 0.01 1 t/s Fig ...

Page 4

... Fig.8. Typical transconductance ˚C . Fig.9. Normalised drain-source on-state resistance -100 Product specification BUK7880- ID f(I ); conditions BUK98XX-55 Rds(on) normalised to 25degC -100 - 100 Tmb / degC / DS(ON) DS(ON)25 ˚ VGS(TO max. typ. min. - 100 Fig.10. Gate threshold voltage. = f(T ) ...

Page 5

... IF 120 110 100 Ciss Coss Crss 10 100 , Fig.15. Normalised avalanche energy rating. iss oss rss VDS = 44V VGS Product specification BUK7880-55 25 150 Tj 0.5 1 1.5 VSDS/V Fig.14. Typical reverse diode current. = f(V ); conditions parameter T SDS GS WDSS 100 120 Tmb / f(T ) ...

Page 6

... Philips Semiconductors TrenchMOS transistor Standard level FET RD VGS RG 0 Fig.17. Switching test circuit. April 1998 VDD + VDS - T.U.T. 6 Product specification BUK7880-55 Rev 1.100 ...

Page 7

... Philips Semiconductors TrenchMOS transistor Standard level FET PRINTED CIRCUIT BOARD Fig.18. PCB for thermal resistance and power rating for SOT223. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 m thick). April 1998 Product specification BUK7880-55 Dimensions in mm. 18 4.5 Rev 1.100 ...

Page 8

... Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL94 V0 at 1/8". April 1998 3.1 0.32 0.24 2.9 0.10 0. max 1.05 1.8 2.3 max 0.85 Fig.19. SOT223 surface mounting package. 8 Product specification BUK7880-55 6.7 6 3.7 7.3 6.7 3 0.80 M 0.1 B 0.60 (4x) 4.6 0 Rev 1 ...

Page 9

... Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1998 9 Product specification BUK7880-55 Rev 1.100 ...

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