IRLZ24NS International Rectifier, IRLZ24NS Datasheet
IRLZ24NS
Specifications of IRLZ24NS
Available stocks
Related parts for IRLZ24NS
IRLZ24NS Summary of contents
Page 1
... Logic-Level Gate Drive Advanced Process Technology Surface Mount (IRLZ24NS) Low-profile through-hole (IRLZ24NL) 175°C Operating Temperature Fast Switching Fully Avalanche Rated Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. benefit, combined with the fast switching speed and ...
Page 2
... IRLZ24NS/L Electrical Characteristics @ T Parameter V Drain-to-Source Breakdown Voltage (BR)DSS Breakdown Voltage Temp. Coefficient (BR)DSS J R Static Drain-to-Source On-Resistance DS(on) V Gate Threshold Voltage GS(th) g Forward Transconductance fs I Drain-to-Source Leakage Current DSS Gate-to-Source Forward Leakage I GSS Gate-to-Source Reverse Leakage Q Total Gate Charge g Q Gate-to-Source Charge ...
Page 3
... Fig 3. Typical Transfer Characteristics TOP BOTTOM 2. 0 0.1 V Fig 2. Typical Output Characteristics 3 2.5 2.0 1.5 1.0 0.5 0.0 A -60 -40 - Junction T em perature (° Fig 4. Normalized On-Resistance IRLZ24NS/L VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V 2 .5V 2 0µ ° rain-to-S ource V oltage ( Vs. Temperature ...
Page 4
... IRLZ24NS iss oss rss rain-to-S ourc e V oltage ( Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage ° 5° 0.4 0.8 1 ourc e-to-D rain V oltage ( Fig 7. Typical Source-Drain Diode Fig 6. Typical Gate Charge Vs ing lse A 1 1.6 2.0 1 Fig 8. Maximum Safe Operating Area = CIR FIG ...
Page 5
... Fig 9. Maximum Drain Current Vs. Case Temperature . .01 0.1 SIN LSE ( Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case R Pulse Width Duty Factor Fig 10a. Switching Time Test Circuit d(on) Fig 10b. Switching Time Waveforms ectan gu lar P ulse D u ratio n ( IRLZ24NS D.U. 5.0V µ d(off ...
Page 6
... IRLZ24NS D.U. 5 0.01 Fig 12a. Unclamped Inductive Test Circuit Fig 12b. Unclamped Inductive Waveforms Charge Fig 13a. Basic Gate Charge Waveform (BR)DSS tarting unc tion T em perature (°C ) Fig 12c. Maximum Avalanche Energy 12V V GS Fig 13b. Gate Charge Test Circuit ...
Page 7
... Current Current D.U.T. V Waveform DS Diode Recovery Re-Applied Voltage Body Diode Inductor Curent Ripple for Logic Level Devices GS Fig 14. For N-Channel HEXFETS IRLZ24NS/L Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - + + controlled by Duty Factor "D" P. Period V =10V ...
Page 8
... IRLZ24NS Pak Package Outline 1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) - AX. 2 1 (.6 10) 1 (.5 80 1.40 (.0 55) 3X 1.14 (.0 45) 0 .93 (. .69 (. .08 (. .25 (. FTER IP & 4.5M , 198 TRO L LIN SIO ATSINK & Part Marking Information 2 D Pak TIO 4.69 (.1 85) 4.20 (.1 65) 1 ...
Page 9
... Package Outline TO-262 Outline Part Marking Information TO-262 IRLZ24NS/L ...
Page 10
... IRLZ24NS/L Tape & Reel Information 2 D Pak IRE CTIO (. (. IRE C TIO N 33 0.00 (1 4 LLIN ILL WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel 6172 96590 IR FAR EAST: K& ...
Page 11
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/ ...