SI3201-FSR Silicon Laboratories Inc, SI3201-FSR Datasheet - Page 43

• Manufacturer Part Number: SI3201-FSR
• Description: SLIC 1-CH 60dB 41mA 3.3V/5V 16-Pin SOIC EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3201-FSR

• Package: 16SOIC EP
• Number Of Channels Per Chip: 1
• Longitudinal Balanced: 60 dB
• Loop Current: 41 mA
• Minimum Operating Supply Voltage: 3.13 V
• Typical Operating Supply Voltage: 3.3|5 V
• Typical Supply Current: 88 mA

2.5. Audio Path
Unlike traditional SLICs, the codec function is integrated
into the ProSLIC. The 16-bit codec offers software-
selectable 200 Hz to 3.4 kHz narrowband and 50 Hz to
7 kHz
programmable gain/attenuation blocks, and several
loop-back modes. The signal path block diagram is
shown in Figure 24.
2.5.1. Transmit Path
In the transmit path, the analog signal fed by the external
ac coupling capacitors is amplified by the analog
transmit amplifier, ATX, prior to the A/D converter. ATX
has the following gain options: mute, –3.5, 0, and
3.5 dB. The main role of ATX is to coarsely adjust the
signal swing to be as close as possible to the full-scale
input of the A/D converter to maximize the signal-to-
Parameter
Ring Trip Interrupt Pending
Ring Trip Interrupt Enable
Ring Trip Detect Debounce Interval
Ring Trip Threshold
Ring Trip Filter Coefficient
Ring Trip Detect Status (monitor only)
Note: The ProSLIC uses registers that are both directly and indirectly mapped. A “direct” register is one that is mapped
Frequency
Ringing
16.667
Hz
20
30
40
50
60
directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28 through
31).
(Si3216
only)
decimal
100
112
128
213
256
64
Table 30. Associated Registers for Ring Trip Detection
Table 31. Recommended Ring Trip Values for Ringing
wideband
NRTP
06A8
0200
0320
0380
0400
0800
hex
audio
modes,
Rev. 1.0
decimal
34 mA
34 mA
34 mA
34 mA
34 mA
34 mA
noise ratio of the transmit path. After passing through an
anti-aliasing filter, the analog signal is processed by the
A/D converter, producing a 16-bit wide, linear PCM data
stream. The standard requirements for transmit path
attenuation for signal frequencies above the audio band
are implemented as part of the combined decimation
filter characteristic of the A/D converter. An additional
filter, THPF, implements the high-pass attenuation
requirements for signals below 50 Hz. The linear PCM
data stream output from THPF is amplified by the
transmit-path programmable gain amplifier, ADCG,
which can be programmed from –
step in the transmit path signal processing is the user-
selectable A-law or µ-law compression block. In
narrowband mode, µ-law or A-law compression can be
selected to reduce the data stream word width to 8 bits.
NRTP[12:0]
RPTP[5:0]
RPTP
RTDI[6:0]
Register
RTIP
RTIE
RTP
3600
3600
3600
3600
3600
3600
hex
15.4 ms
12.3 ms
8.96 ms
decimal
7.5 ms
4.8 ms
Indirect Register 16
Indirect Register 23
5 ms
Direct Register 19
Direct Register 22
Direct Register 70
Direct Register 68

Location
dB to 6 dB. The final
RTDI
Si3216
hex
0F
0B
09
07
05
05
43