SI3201-FSR Silicon Laboratories Inc, SI3201-FSR Datasheet - Page 97

• Manufacturer Part Number: SI3201-FSR
• Description: SLIC 1-CH 60dB 41mA 3.3V/5V 16-Pin SOIC EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3201-FSR

• Package: 16SOIC EP
• Number Of Channels Per Chip: 1
• Longitudinal Balanced: 60 dB
• Loop Current: 41 mA
• Minimum Operating Supply Voltage: 3.13 V
• Typical Operating Supply Voltage: 3.3|5 V
• Typical Supply Current: 88 mA

Register 96. Calibration Control/Status Register 1
Reset settings = 0001_1111
Name
Type
Bit
7
6
5
4
3
2
1
0
Bit
Reserved
CALSP
CALIL
Name
CALR
CALD
CALC
D7
CALT
CAL
CAL
R/W
D6
Read returns zero.
Calibration Control/Status Bit.
Setting this bit begins calibration of the entire system.
0 = Normal operation or calibration complete.
1 = Calibration in progress.
Calibration Speedup.
Setting this bit shortens the time allotted for V
calibration cycle.
0 = 300 ms
1 = 30 ms
RING Gain Mismatch Calibration.
For use with discrete solution only. When using the Si3201, consult “AN35: Si321x
User’s Quick Reference Guide” and follow the instructions for manual calibration.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
TIP Gain Mismatch Calibration.
For use with discrete solution only. When using the Si3201, consult “AN35: Si321x
User’s Quick Reference Guide” and follow the instructions for manual calibration.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
Differential DAC Gain Calibration.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
Common Mode DAC Gain Calibration.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
I
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
LIM
Calibration.
CALSP
R/W
D5
CALR
R/W
D4
Rev. 1.0
CALT
R/W
D3
Function
CALD
R/W
BAT
D2
settling at the beginning of the
CALC
R/W
D1
CALIL
R/W
D0
Si3216
97