8543BGILF Integrated Device Technology (Idt), 8543BGILF Datasheet - Page 10

• Manufacturer Part Number: 8543BGILF
• Description: Clock Driver 2-IN LVDS 20-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 8543BGILF

• Package: 20TSSOP
• Configuration: 1 x 2:1
• Input Signal Type: CML/HCSL/LVDS/LVHSTL/LVPECL/SSTL
• Maximum Output Frequency: 650 MHz
• Operating Supply Voltage: 3.3 V

Parameter Measurement Information, continued
Output Short Circuit Current Setup
Application Information
Wiring the Differential Input to Accept Single Ended Levels
Figure 2 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the
center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
R2/R1 = 0.609.
IDT™ / ICS™ LVDS FANOUT BUFFER
ICS8543I
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
DC Input
V
DD
LVDS
DD
= 3.3V, V_REF should be 1.25V and
out
out
DD
I
I
OSB
OS
/2 is
10
Power Off Leakage Setup
Figure 2. Single-Ended Signal Driving Differential Input
CLK_IN
0.1uF
C1
LVDS
ICS8543BGI REV. E SEPTEMBER 9, 2008
R1
1K
V_REF
R2
1K
V
DD
+
-
I
OFF
V
DD