MT46V16M16P-5B:K TR Micron Technology Inc, MT46V16M16P-5B:K TR Datasheet - Page 5
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MT46V16M16P-5B:K TR
Manufacturer Part Number
MT46V16M16P-5B:K TR
Description
DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.6V 66-Pin TSOP T/R
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46V16M16CY-5BK_TR.pdf
(93 pages)
Specifications of MT46V16M16P-5B:K TR
Package
66TSOP
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
2.6 V
Maximum Clock Rate
400 MHz
Maximum Random Access Time
0.7 ns
Operating Temperature
0 to 70 °C
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State Diagram
Figure 2:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core1.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
Simplified State Diagram
Note:
applied
Power
This diagram represents operations within a single bank only and does not capture concur-
rent operations in other banks.
ACT = ACTIVE
BST = BURST TERMINATE
CKEH = Exit power-down
CKEL = Enter power-down
EMR = Extended mode register
LMR = LOAD MODE REGISTER
MR = Mode register
WRITE
Precharge
all banks
Power
PRE
EMR
LMR
PRE
WRITE A
MR
on
Write A
power-
Active
down
Write
CKE LOW
WRITE
LMR
CKE HIGH
4
WRITE A
PRE
precharged
Precharge
all banks
PREALL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
active
ACT
Row
PRE
Idle
READ A
PRE = PRECHARGE
PREALL = PRECHARGE all banks
READ A = READ with auto precharge
REFA = AUTO REFRESH
REFS = Enter self refresh
REFSX = Exit self refresh
WRITE A = WRITE with auto precharge
CKEH
READ
REFS
READ A
PRE
256Mb: x4, x8, x16 DDR SDRAM
REFSX
CKEL
READ
Precharge
REFA
refresh
power-
down
Self
BST
Read A
Burst
Read
stop
Automatic sequence
Command sequence
READ A
©2003 Micron Technology, Inc. All rights reserved.
refresh
Auto
READ
State Diagram
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