MT48LC4M16A2P-75:G Micron Technology Inc, MT48LC4M16A2P-75:G Datasheet - Page 9

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MT48LC4M16A2P-75:G

Manufacturer Part Number
MT48LC4M16A2P-75:G
Description
DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Series
-r
Datasheet

Specifications of MT48LC4M16A2P-75:G

Density
64 Mb
Maximum Clock Rate
133 MHz
Package
54TSOP-II
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
0 to 70 °C
Organization
4Mx16
Address Bus
14b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (4M x 16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-TSOP (0.400", 10.16mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 3:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
BA0, BA1
A0–A11,
CAS#
RAS#
WE#
CKE
CLK
CS#
14
ADDRESS
REGISTER
4 Meg x 16 SDRAM
MODE REGISTER
CONTROL
LOGIC
12
COUNTER
REFRESH
12
8
2
12
ADDRESS
2
ROW-
MUX
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
LOGIC
BANK
12
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
8
4096
9
READ DATA LATCH
DQM MASK LOGIC
SENSE AMPLIFIERS
(4,096 x 256 x 16)
WRITE DRIVERS
I/O GATING
DECODER
MEMORY
COLUMN
BANK0
ARRAY
(x16)
4096
256
BANK1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BANK2
BANK3
Functional Block Diagrams
16
64Mb: x4, x8, x16 SDRAM
16
2
REGISTER
REGISTER
OUTPUT
INPUT
DATA
DATA
©2000 Micron Technology, Inc. All rights reserved.
2
16
DQML,
DQMH
DQ0–DQ15

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