72261LA15TFI Integrated Device Technology (Idt), 72261LA15TFI Datasheet - Page 21

• Manufacturer Part Number: 72261LA15TFI
• Description: FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 9 64-Pin STQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72261LA15TFI

• Package: 64STQFP
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 144 Kb
• Organization: 16Kx9
• Data Bus Width: 9 Bit
• Timing Type: Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: -40 to 85 °C

Q
NOTE:
1. X = 13 for the IDT72261LA and X = 14 for the IDT72271LA.
NOTES:
1. Retransmit setup is complete after OR returns LOW.
2. No more than D - 2 words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup
3. OE = LOW
4. W
5. OR goes LOW at 60 ns + 2 RCLK cycles + t
WCLK
IDT72261LA/72271LA SuperSync FIFO™
16,384 x 9 and 32,768 x 9
WCLK
RCLK
0
procedure. D = 16,385 for the IDT72261LA and 32,769 for the IDT72271LA.
WEN
SEN
REN
PAE
- Q
PAF
LD
OR
1
HF
RT
, W
SI
n
2
, W
t
ENS
3
= first, second and third words written to the FIFO after Master Reset.
W
x
Figure 13. Serial Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
t
ENH
BIT 0
t
t
t
ENS
LDS
DS
t
ENS
t
RTS
t
RTS
REF
.
t
t
LDH
ENH
EMPTY OFFSET
t
t
REF
t
ENH
HF
t
SKEW4
Figure 12. Retransmit Timing (FWFT Mode)
1
2
t
PAF
1
W
x+1
BIT X
21
(1)
BIT 0
2
t
PAE
FULL OFFSET
COMMERCIAL AND INDUSTRIAL
3
t
A
t
ENH
t
REF
TEMPERATURE RANGES
(5)
W
1
(4)
BIT X
t
t
t
LDH
LDH
t
ENH
DH
JANUARY 7, 2009
(1)
W
4
2
t
A
4671 drw 16
t
ENH
4671 drw15
W
3