72261LA15TFI Integrated Device Technology (Idt), 72261LA15TFI Datasheet - Page 27

• Manufacturer Part Number: 72261LA15TFI
• Description: FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 9 64-Pin STQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72261LA15TFI

• Package: 64STQFP
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 144 Kb
• Organization: 16Kx9
• Data Bus Width: 9 Bit
• Timing Type: Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: -40 to 85 °C

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is pin-for-pin compatible with the original “L” version. Some difference exist between the two versions. The following table details these differences.
NOTES:
1. WCLK and RCLK can vary independently and can be stopped. There is no restriction on operating WCLK and RCLK.
2. This is t
3. Tf is the period of the ‘selected clock’.
4. T
5. Typical I
IDT, IDT logo are registered trademarks of Integrated Device Technology, Inc.The SuperSync FIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
RCLK
IDT has improved the performance of the IDT72261/72271 SuperSync™ FIFOs. The new versions are designated by the “LA” mark. The LA part
DIFFERENCES BETWEEN THE IDT72261LA/72271LA AND IDT72261L/72271L
Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice
is the cycle period of the read clock.
SKEW3
CC1
(FWFT Mode)
Pin #3
First Word Latency
(IDT Standard Mode)
First Word Latency
(FWFT Mode)
Retransmit Latency
(IDT Standard Mode)
Retransmit Latency
I
I
Typical I
is based on V
CC1
CC2
.
Item
CC1
CC
(5)
= 5V, t
A
= 25C, f
DC (Don’t Care) - There is
RCLK. See note 1.
60ns
60ns
60ns
60ns
75mA
20mA
15 + 1.85*f
no restriction on WCLK and
S
= WCLK frequency = RCLK frequency (in MHz using TTL levels), data switching at f
3.3 VOLT CMOS SuperSync FIFO
16,384 x 9
32,768 x9
(2)
(2)
(2)
(2)
+ t
+ t
+ t
+ t
IDT72261LA
IDT72271LA
NEW PART
REF
REF
REF
REF
S
+ 0.02*C
+ 1 T
+ 2 T
+ 1 T
+ 2 T
RCLK
RCLK
RCLK
RCLK
L
*f
(4)
(4)
(4)
(4)
S
(mA)
FS (Frequency Select)
t
t
t
t
150mA
15mA
Not Given
FWL
FWL
RTF
RTF
27
1
2
1
2
= 14*Tf
= 14*Tf
= 10*Tf
= 10*Tf
ADDENDUM
OLD PART
IDT72261L
IDT72271L
(3)
(3)
(3)
(3)
+ 3T
+ 4T
+ 2T
+ 3T
™
RCLK
RCLK
RCLK
RCLK
(4)
(4)
(4)
(4)
(ns)
(ns)
(ns)
(ns)
In the LA part this pin must be tied
to either V
not toggle after reset.
First word latency in the LA part
is a fixed value, independent of
the frequency of RCLK or WCLK.
First word latency in the LA part
is a fixed value, independent of
the frequency of RCLK or WCLK.
Retransmit latency in the LA part
is a fixed value, independent of
the frequency of RCLK or WCLK.
Retransmit latency in the LA part
is a fixed value, independent of
the frequency of RCLK or WCLK.
Active supply current
Standby current
Typical I
S
/2, C
L
Comments
CC1
= Capacitive Load (in pF).
CC
Current calculation
or GND and must
IDT72261LA
IDT72271LA