XC3S700AN-5FGG484C Xilinx Inc, XC3S700AN-5FGG484C Datasheet - Page 14
![FPGA Spartan®-3AN Family 700K Gates 13248 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA](/photos/6/72/67299/pk081-484_sml.jpg)
XC3S700AN-5FGG484C
Manufacturer Part Number
XC3S700AN-5FGG484C
Description
FPGA Spartan®-3AN Family 700K Gates 13248 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S700AN-5FGG484C
Package
484FBGA
Family Name
Spartan®-3AN
Device Logic Units
13248
Device System Gates
700000
Maximum Internal Frequency
770 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
372
Ram Bits
368640
Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Total Ram Bits
368640
Number Of I /o
372
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1528 - KIT STARTER SPARTAN-3 AN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S700AN-5FGG484C
Manufacturer:
XILINX
Quantity:
748
Company:
Part Number:
XC3S700AN-5FGG484C
Manufacturer:
Xilinx Inc
Quantity:
10 000
General Recommended Operating Conditions
Table 10: General Recommended Operating Conditions
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
2.
3.
4.
This V
range specific to each of the single-ended I/O standards, and
See XAPP459, Eliminating I/O Coupling Effects when Interfacing Large-Swing Single-Ended Signals to User I/O Pins on Spartan-3 Families.
For single-ended signals that are placed on a differential-capable I/O, V
between the two pins. See Parasitic Leakage in UG331, Spartan-3 Generation FPGA User Guide.
Measured between 10% and 90% V
Symbol
V
V
V
V
CCO
CCAUX
CCINT
T
IN
T
IN
J
(2)
CCO
(1)
range spans the lowest and highest operating voltages for all supported I/O standards.
Junction temperature
Internal supply voltage
Output driver supply voltage
Auxiliary supply voltage
Input voltage
Input signal transition time
CCO
. Follow
(4)
Description
Commercial
Industrial
V
PCI IOSTANDARD
All other
IOSTANDARDs
Signal Integrity
CCAUX
= 3.3V
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
Table 15
recommendations.
lists that specific to the differential standards.
IN
IP or IO_#
IO_Lxxy_#
of –0.2V to –0.5V is supported but can cause increased leakage
(3)
1.14
1.10
3.00
–0.5
–0.5
–0.5
Min
–40
0
–
Table 13
Nominal
1.20
3.30
lists the recommended V
–
–
–
–
–
–
–
V
CCO
Max
1.26
3.60
3.60
4.10
4.10
100
500
85
+ 0.5
Units
CCO
°C
°C
ns
V
V
V
V
V
V
14