XC3S700AN-5FGG484C Xilinx Inc, XC3S700AN-5FGG484C Datasheet - Page 39
![FPGA Spartan®-3AN Family 700K Gates 13248 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA](/photos/6/72/67299/pk081-484_sml.jpg)
XC3S700AN-5FGG484C
Manufacturer Part Number
XC3S700AN-5FGG484C
Description
FPGA Spartan®-3AN Family 700K Gates 13248 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S700AN-5FGG484C
Package
484FBGA
Family Name
Spartan®-3AN
Device Logic Units
13248
Device System Gates
700000
Maximum Internal Frequency
770 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
372
Ram Bits
368640
Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Total Ram Bits
368640
Number Of I /o
372
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1528 - KIT STARTER SPARTAN-3 AN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S700AN-5FGG484C
Manufacturer:
XILINX
Quantity:
748
Company:
Part Number:
XC3S700AN-5FGG484C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Table 29:
DS557 (v4.1) April 1, 2011
Product Specification
LVCMOS25
LVCMOS25 with 12 mA Drive
Following Signal Standard
Convert Output Time from
and Fast Slew Rate to the
(IOSTANDARD)
Output Timing Adjustments for IOB
QuietIO
Slow
Fast
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
Adjustment Below
25.92
25.92
25.92
15.57
15.59
14.27
11.37
5.33
2.81
2.82
1.14
1.10
0.83
2.26
4.36
1.76
1.25
0.38
0.01
0.01
Speed Grade
-5
0
Add the
(3)
25.92
25.92
25.92
15.57
15.59
14.27
11.37
5.33
2.81
2.82
1.14
1.10
0.83
2.26
4.36
1.76
1.25
0.38
0.01
0.01
(Cont’d)
-4
0
(3)
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
Table 29:
LVCMOS18
LVCMOS15
LVCMOS25 with 12 mA Drive
Following Signal Standard
Convert Output Time from
and Fast Slew Rate to the
(IOSTANDARD)
Output Timing Adjustments for IOB
QuietIO
QuietIO
Slow
Slow
Fast
Fast
12 mA
16 mA
12 mA
16 mA
12 mA
16 mA
12 mA
12 mA
12 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
Adjustment Below
24.97
24.97
24.08
16.43
14.52
13.41
34.11
25.66
24.64
22.06
20.64
4.48
3.69
2.91
1.99
1.57
1.19
3.96
2.57
1.90
1.06
0.83
0.63
5.82
3.97
3.21
2.53
2.06
5.23
3.05
1.95
1.60
1.30
Speed Grade
-5
Add the
24.97
24.97
24.08
16.43
14.52
13.41
34.11
25.66
24.64
22.06
20.64
4.48
3.69
2.91
1.99
1.57
1.19
3.96
2.57
1.90
1.06
0.83
0.63
5.82
3.97
3.21
2.53
2.06
5.23
3.05
1.95
1.60
1.30
(Cont’d)
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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