XC3S700AN-5FGG484C Xilinx Inc, XC3S700AN-5FGG484C Datasheet - Page 19
![FPGA Spartan®-3AN Family 700K Gates 13248 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA](/photos/6/72/67299/pk081-484_sml.jpg)
XC3S700AN-5FGG484C
Manufacturer Part Number
XC3S700AN-5FGG484C
Description
FPGA Spartan®-3AN Family 700K Gates 13248 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S700AN-5FGG484C
Package
484FBGA
Family Name
Spartan®-3AN
Device Logic Units
13248
Device System Gates
700000
Maximum Internal Frequency
770 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
372
Ram Bits
368640
Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Total Ram Bits
368640
Number Of I /o
372
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1528 - KIT STARTER SPARTAN-3 AN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S700AN-5FGG484C
Manufacturer:
XILINX
Quantity:
748
Company:
Part Number:
XC3S700AN-5FGG484C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Differential I/O Standards
Differential Input Pairs
X-Ref Target - Figure 6
Table 15: Recommended Operating Conditions for User I/Os Using Differential Signal Standards
DS557 (v4.1) April 1, 2011
Product Specification
LVDS_25
LVDS_33
BLVDS_25
MINI_LVDS_25
MINI_LVDS_33
LVPECL_25
LVPECL_33
RSDS_25
RSDS_33
TMDS_33
PPDS_25
PPDS_33
DIFF_HSTL_I_18
DIFF_HSTL_II_18
DIFF_HSTL_III_18
DIFF_HSTL_I
DIFF_HSTL_III
DIFF_SSTL18_I
DIFF_SSTL18_II
DIFF_SSTL2_I
DIFF_SSTL2_II
DIFF_SSTL3_I
IOSTANDARD Attribute
(3)
(3)
(3)
(3)
(3)
(3)
(3,4,7)
(4)
(5)
(5)
(8)
(8)
(8)
(8)
(3)
(3)
(8,9)
(8)
(8,9)
(8)
(8,9)
(8)
Internal
GND level
Logic
Min (V)
2.25
2.25
2.25
2.25
3.14
2.25
3.0
3.0
3.0
3.0
1.7
1.7
1.7
1.4
1.4
1.7
1.7
2.3
2.3
3.0
V
V
INN
INP
V
CCO
Inputs Only
Inputs Only
V
Nom (V)
for Drivers
V
ICM
2.5
3.3
2.5
2.5
3.3
2.5
3.3
3.3
2.5
3.3
1.8
1.8
1.8
1.5
1.5
1.8
1.8
2.5
2.5
3.3
ID
Figure 6: Differential Input Voltages
= Input common mode voltage =
= Differential input voltage = V
50%
(1)
Max (V)
2.75
2.75
2.75
2.75
3.47
2.75
V
3.6
3.6
3.6
3.6
1.9
1.9
1.9
1.6
1.6
1.9
1.9
2.7
2.7
3.6
ICM
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
Min (mV) Nom (mV) Max (mV)
100
100
100
200
200
100
100
100
100
150
100
100
100
100
100
100
100
100
100
100
100
100
V
V
V
INP
ID
INN
INP
V
350
350
300
800
800
200
200
V
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
INP
- V
ID
N
P
INN
+ V
2
INN
Differential
I/O Pair Pins
1000
1000
1200
600
600
600
600
400
400
–
–
–
–
–
–
–
–
–
–
–
–
–
DS529-3_10_012907
Min (V)
0.68
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
2.7
0.2
0.2
0.8
0.8
0.8
0.7
0.7
1.0
1.0
1.1
–
Nom (V)
V
1.25
1.25
ICM
1.3
1.2
1.2
1.2
1.2
1.2
1.2
0.9
–
–
–
–
–
–
–
–
–
–
–
(2)
Max (V)
2.35
2.35
2.35
1.95
1.95
1.95
3.23
2.8
1.5
1.5
2.3
2.3
1.1
1.1
1.1
0.9
1.1
1.1
1.5
1.5
1.9
–
(6)
19