PUMD2,165 NXP Semiconductors, PUMD2,165 Datasheet - Page 3

TRANS NPN/PNP 50V 100MA SOT363

PUMD2,165

Manufacturer Part Number
PUMD2,165
Description
TRANS NPN/PNP 50V 100MA SOT363
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMD2,165

Package / Case
SC-70-6, SC-88, SOT-363
Transistor Type
1 NPN, 1 PNP - Pre-Biased (Dual)
Current - Collector (ic) (max)
100mA
Voltage - Collector Emitter Breakdown (max)
50V
Resistor - Base (r1) (ohms)
22K
Resistor - Emitter Base (r2) (ohms)
22K
Dc Current Gain (hfe) (min) @ Ic, Vce
60 @ 5mA, 5V
Vce Saturation (max) @ Ib, Ic
150mV @ 500µA, 10mA
Current - Collector Cutoff (max)
1µA
Power - Max
300mW
Mounting Type
Surface Mount
Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
22 KOhms
Typical Resistor Ratio
1
Mounting Style
SMD/SMT
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Transition
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
934049950165
PUMD2 /T2
PUMD2 /T2
NXP Semiconductors
4. Marking
5. Limiting values
PEMD2_PIMD2_PUMD2_7
Product data sheet
Table 5.
[1]
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Type number
PEMD2
PIMD2
PUMD2
Symbol
Per transistor; for the PNP transistor with negative polarity
V
V
V
V
I
I
P
T
T
T
O
CM
j
amb
stg
CBO
CEO
EBO
I
tot
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Marking codes
Limiting values
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage TR1
input voltage TR2
output current
peak collector current
total power dissipation
junction temperature
ambient temperature
storage temperature
positive
negative
positive
negative
PEMD2 (SOT666)
PIMD2 (SOT457)
PUMD2 (SOT363)
Rev. 07 — 24 September 2008
NPN/PNP resistor-equipped transistors; R1 = 22 k , R2 = 22 k
Conditions
open emitter
open base
open collector
single pulse;
t
T
p
PEMD2; PIMD2; PUMD2
amb
1 ms
25 C
Marking code
D4
M5
D*2
[1]
[1]
[2]
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
65
65
© NXP B.V. 2008. All rights reserved.
Max
50
50
10
+40
+10
100
100
200
300
200
150
+150
+150
10
40
Unit
V
V
V
V
V
V
V
mA
mA
mW
mW
mW
C
C
C
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