TDA8295HN/C1 NXP Semiconductors, TDA8295HN/C1 Datasheet - Page 9

• Manufacturer Part Number: TDA8295HN/C1
• Description: Modulator / Demodulator IF DEMODULATOR
• Manufacturer: NXP Semiconductors

Specifications of TDA8295HN/C1

• Package / Case: HVQFN-40
• Maximum Operating Temperature: + 70 C
• Maximum Power Dissipation: 490 mW
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.2 V, 3.3 V
• Supply Current: 0.136 A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA8295HN/C1,557

NXP Semiconductors
Table 4.
[1]
TDA8295_1
Product data sheet
Symbol
Boundary scan
TMS
TRST_N
TCK
TDI
TDO
ADC
IF_POS
IF_NEG
DAC
V_IOUTP
V_IOUTN
S_IOUTP
S_IOUTN
RSET
Supplies and grounds
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Other pins
i.c.
i.c.
i.c.
DDA(DAC1)(3V3)
DDA(DAC2)(3V3)
SSA(DAC)
DDA(ADC)(3V3)
DDD(ADC)(3V3)
SSA(ADC)
DDD1(1V2)
SSD1
DDA(PLL)(1V2)
SSA(PLL)
DDD2(1V2)
SSD2
DDDR(3V3)
SSDR
All digital inputs are 5 V tolerant (except pin XIN).
Pin description
Pin
24
30
27
23
22
1
2
14
13
17
16
11
15
18
12
3
39
40
4
5
7
10
25
26
34
35
36
38
6
…continued
Type
I
I
I
I
O
AI
AI
AO
AO
AO
AO
I
PS
PS
GND
PS
PS
GND
PS
GND
PS
GND
PS
GND
PS
GND
I
I
I
[1][2]
Digital global standard low IF demodulator for analog TV and FM radio
Description
Test mode select provides the logic levels needed to change the TAP controller
from state to state during the boundary scan test.
Test reset is used to reset the TAP controller (active LOW). Grounding is
mandatory in Functional mode.
Test clock is used to drive the TAP controller.
Test data input is the serial data input for the test data instruction.
Test data output is the serial test data output pin. The data is provided on the
falling edge of TCK.
IF positive analog input for internal ADC
IF negative analog input for internal ADC
positive analog current output of the video output
negative analog current output of the video output
positive analog current output of the SSIF/mono sound output
negative analog current output of the SSIF/mono sound output
External bias setting of the DACs. An external resistor (1 k typical) has to be
connected between RSET and the analog ground of the board. This resistor
generates the current into the DACs and also defines the full scale output
current. The total parasitic capacitance seen externally from the RSET pin has to
be lower than 20 pF.
DAC1 (video DAC) and DAC reference module analog supply voltage (3.3 V
typical)
DAC2 (sound DAC) analog supply voltage (3.3 V typical)
DAC reference module analog ground supply voltage (0 V typical)
IF ADC analog supply voltage (3.3 V typical)
IF ADC digital supply voltage (3.3 V typical)
ADC analog ground supply voltage (0 V typical)
ADC, PLL and DACs digital supply voltage (1.2 V typical)
ADC, PLL and DACs digital ground supply voltage (0 V typical)
crystal oscillator and clock PLL analog supply voltage (1.2 V typical)
crystal oscillator and clock PLL analog ground supply voltage (0 V typical)
core digital supply voltage (1.2 V typical)
core digital ground supply voltage (0 V typical)
ring digital supply voltage (3.3 V typical)
ring digital ground supply voltage (0 V typical)
internally connected; connect to ground
internally connected; connect to ground
internally connected; connect to ground
Rev. 01 — 4 February 2008
TDA8295
© NXP B.V. 2008. All rights reserved.
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