M54455EVB Freescale, M54455EVB Datasheet - Page 36

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M54455EVB

Manufacturer Part Number
M54455EVB
Description
Manufacturer
Freescale
Datasheet

Specifications of M54455EVB

Architecture
32-bit (not ARM)
Lead Free Status / RoHS Status
Supplier Unconfirmed
1
2
Reference Designator
The following table describes the interface headers.
36
ON indicates that a shunt should be fitted on the jumper; OFF indicates that no shunt should be applied.
Default setting.
H21[1:2]
H21[3:4]
H21[5:6]
H21[7:8]
JP907
JP908
JP903
JP904
JP909
JP910
JP911
JP912
JP918
H10
H11
H12
H13
Setting
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
2:3
1:2
2:3
1:2
ON
ON
ON
ON
1:2
2:3
1:2
2:3
Reference Designator
2
2
2
2
2
2
2
2
2
2
1
Power Barrel Connector Enable
Enable VDD to the processor
Disable VDD to the processor
Note: R665 is fitted by default and bypasses H11
Enable VEE to the processor
Disable VEE to the processor
Note: R664 is fitted by default and bypasses H12
Enable V1.5 to the processor
Disable V1.5 to the processor
Note: R659 is fitted by default and bypasses H13
Connect I2C_SCL, I2C_SDA, ATA_BUFFER_EN, and DSPI_PCS2 from MCF5445x to
FPGA program header pins
Enable UART1 flow control signals
Disable UART1 flow control signals
Boot into JTAG mode
Boot into BDM mode
Connect BDM pin 24 to MCF5445x TCLK_PSTCLK
Connect BDM pin 6 to MCF5445x TCLK_PSTCLK
Connect UART0 signals to DB9 interface
Connect UART0 signals to USB interface
Connect MCF5445x USBCLKIN to CLKOUT of USB3300
Connect MCF5445x USBCLKIN to 60MHz from external clock generator
H14
H15
H16
H20
H9
Table 35. Jumper Settings (continued)
M54455EVB User’s Manual, Rev. 4
Table 36. Interface Headers
System power indicator for case LED
Board reset header for case switch
Power ON/OFF for case switch
ATA activity indicator for case LED
FPGA program header
Function
Function
Freescale Semiconductor